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[Other resource] 000000adada2

Description: 数据结构，二叉树和哈夫曼编码。C++ 1、 学会针对DFA转换图实现相应的高级语言源程序 ·a C++ Class Library of Cr ·简单的防火墙，可以用来学习，作为毕业课设也相当有帮 ·实现ARM 芯片的一对PWM 输出用于控制直流电机 ·Programming the Microsoft ·VC调用java的简单例子。需要注意jvm.dll ·这是介绍在VC++6。0下如何编写GPIB程序。有 ·GPS坐标转换软件：直角坐标与大地坐标转换 ·我的一个同学写的毕业论文 希望对大家来说是有用的 ·最简单的用工作线程控制有进程条的窗口,主窗口调用后 ·VC数据库编程综合应用。订单的管理 ·vhdl,用i2c控制philips的7111和7 ·基于winsock2的网络封包截获技术,源代码清楚 -data structure, binary tree and Huffman coding. C 1. Society against DFA conversion map corresponding high-level language source of a Class C of C Library r simple firewall can be used to study, as part of the graduation class is fairly established to help achieve the ARM chip of a PWM output for controlling Motor Prog ramming the Microsoft VC called java simple example. This needs attention jvm.dll is introduced in VC 6. 0 GPIB preparation procedures. Have GPS coordinates conversion software : Cartesian coordinates of the earth and converting one of my classmates wrote the dissertation hope for all of us is the most useful simple Working with a thread control of the process window, the main window after calling VC Database Programming integrated application. Vhdl orders management, i2c co
Platform: | Size: 3519 | Author: ssss3162 | Hits:

[Education soft system] 000000adada2

Description: 数据结构，二叉树和哈夫曼编码。C++ 1、 学会针对DFA转换图实现相应的高级语言源程序 ·a C++ Class Library of Cr ·简单的防火墙，可以用来学习，作为毕业课设也相当有帮 ·实现ARM 芯片的一对PWM 输出用于控制直流电机 ·Programming the Microsoft ·VC调用java的简单例子。需要注意jvm.dll ·这是介绍在VC++6。0下如何编写GPIB程序。有 ·GPS坐标转换软件：直角坐标与大地坐标转换 ·我的一个同学写的毕业论文 希望对大家来说是有用的 ·最简单的用工作线程控制有进程条的窗口,主窗口调用后 ·VC数据库编程综合应用。订单的管理 ·vhdl,用i2c控制philips的7111和7 ·基于winsock2的网络封包截获技术,源代码清楚 -data structure, binary tree and Huffman coding. C 1. Society against DFA conversion map corresponding high-level language source of a Class C of C Library r simple firewall can be used to study, as part of the graduation class is fairly established to help achieve the ARM chip of a PWM output for controlling Motor Prog ramming the Microsoft VC called java simple example. This needs attention jvm.dll is introduced in VC 6. 0 GPIB preparation procedures. Have GPS coordinates conversion software : Cartesian coordinates of the earth and converting one of my classmates wrote the dissertation hope for all of us is the most useful simple Working with a thread control of the process window, the main window after calling VC Database Programming integrated application. Vhdl orders management, i2c co
Platform: | Size: 3072 | Author: | Hits:

[VHDL-FPGA-Verilog] vhdl_crc

Description: 在quartus中用VHDL语言开发的crc校验-Quartus VHDL language used in the development of CRC Checksum
Platform: | Size: 163840 | Author: 夏杰 | Hits:

[Video Capture] camera_up

Description: Camera Interface模块是视频输入转换存储模块。该模块一端接通用的video camera设备，另一端接AHB总线。实现了将Camera捕捉到的数据进行转换、并通过DMA存储到memory中。该IP支持ITU-R BT 601/656 8-bit 模式。支持YCbCr, RGB格式输入。可以将camera产生的YCbCr信号转换成24bit RGB 信号，然后下采样生成16bit RGB 5：6：5的LCD能直接读取显示的数据。该设备支持图像的镜像和翻转，以便适应手持式设备在移动环境中图像的捕捉。可变的同步信号极性使得可以兼容各种摄像头外设。Camera Interface兼容AMBA规范， AHB SLAVE接口，用于读取软件配置数据和设置数据存放地址和1帧数据占用的空间。-The Camera IP Core is small and flexible video data coverter. It is connected to a typical video camera ICs with 8-bit digital video data, Horizontal synchronization and Vertical synchronization signals. The core is connected through FIFO to a WISHBONE bus on the other side. Both sides of the core can operate at fully asynchronous clock frequencies. The Camera IP Core convertes 4:2:2 YCbCr video data (sometimes called YUV, but not totally the same Y is the same, while Cb and Cr are U and V multiplied by a constant) to a 24-bit RGB. 24-bit or 16-bit RGB data, downsampled from 24-bit RGB, is then sent to the system (video) memory, however conversion can also be by-passed. Interrupt can be generated after frame-buffer in system (video) memory is filled up or after setable number of horizontal lines written to frame-buffer.
Platform: | Size: 32768 | Author: 孙喆 | Hits:

[VHDL-FPGA-Verilog] xapp930

Description: RGB to Y CB CR conversion source code in VHDL
Platform: | Size: 46080 | Author: niki | Hits:

[VHDL-FPGA-Verilog] shiyanwu

Description: 用VHDL编程实现一条主干道，一条乡间公路。组成十字路口，要求优先保证主干道通行。有MR（主红）、MY（主黄）、MG（主绿）、CR(乡红)、CY（乡黄）、CG（乡绿）六盏交通灯需要控制；交通灯由绿→红有4秒黄灯亮的间隔时间，由红→绿没有间隔时间；系统有MRCY、MRCG、MYCR、MGCR四个状态；-VHDL programming to a main road, a country road. Composed of a crossroads, requiring priority to ensuring the main road traffic. MR (red), MY (main yellow), MG (green), CR (Township red), CY (Township yellow), CG (Township Green) six traffic lights need to be controlled traffic lights green → red four seconds of yellow light intervals by red → green interval of time system MRCY, MRCG, MYCR, MGCR four states
Platform: | Size: 136192 | Author: 高华 | Hits:

[Software Engineering] projectaq1.cr

Description: Write VHDL specifications for an eight bit twisted ring counter based on each of the designs in the previous problem. Look at the synthesis report generated by the design tools (use the Spartan 2 xc2s15-cs144-6 part for this). How many flip flops are required for each of the designs? How many LUTs of all types? What is the maximum estimated clock frequency?
Platform: | Size: 45056 | Author: john | Hits:

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