Search - VHDL I2S

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[Other resource] I2S DL : 0: 这是一个I2S接口的VHDL实现源代码，I2S是一个通用的音频接口。-This is a I2S interface VHDL source code, I2S is a generic audio interface.
Update : 2008-10-13 Size : 1.51mb Publisher : 孙浩
[VHDL-FPGA-Verilog] I2S DL : 0: 这是一个I2S接口的VHDL实现源代码，I2S是一个通用的音频接口。-This is a I2S interface VHDL source code, I2S is a generic audio interface.
Update : 2025-02-17 Size : 1.51mb Publisher : 孙浩
[VHDL-FPGA-Verilog] i2s_master_slave_vhdl DL : 0: i2s串行线广泛用于音频通信中,这里包括了master和slave的代码.-i2s serial lines widely used in audio communication, here including the master and slave codes.
Update : 2025-02-17 Size : 22kb Publisher : hxwf801
[VHDL-FPGA-Verilog] IIS_VHDL DL : 0: VHDL实现了IIS接口程序，在Quartus II 6.0上编译通过，在板子上可以读取IIS数据-IIS VHDL interface procedures, the Quartus II 6.0 compiled by the board can read data IIS
Update : 2025-02-17 Size : 940kb Publisher : 小刚
[Books] I2S DL : 0: I2S（Inter-IC Sound Bus）是飞利浦公司为数字音频设备之间的音频数据传输而制定的一种总线标准。在飞利浦公司的I2S标准中，既规定了硬件接口规范，也规定了数字音频数据的格式。
Update : 2025-02-17 Size : 53kb Publisher : draking
[SCM] I2SBUS DL : 0: 关于I2S总线的权威资料，来源于philips公司。对开发数字音频有用。-I2S bus on the authority of information, from the philips company. Useful for the development of digital audio.
Update : 2025-02-17 Size : 53kb Publisher : ZHEJIANG
[ARM-PowerPC-ColdFire-MIPS] I2SBUS DL : 0: I2S Bus Specification
Update : 2025-02-17 Size : 53kb Publisher : stkatu
[Other] i2s_rel1_2 DL : 0: I2S verilog HDL code including test environment
Update : 2025-02-17 Size : 268kb Publisher : richman
[VHDL-FPGA-Verilog] spitoi2s3 DL : 0: spi转i2s的verilog程序，fpga是总模块，spi和i2s是子模块，shiftreg是转换-spi transfer i2s the verilog program, fpga is the total module, spi, and i2s is the sub-module, shiftreg is to convert
Update : 2025-02-17 Size : 5kb Publisher : steny
[VHDL-FPGA-Verilog] audio_codec DL : 0: i2s协议时飞利浦公司专门为开发音频而开发的协议，这是它的VHDL代码，希望有帮助-i2s agreement, Philips developed specifically for the development of the audio protocol, which is its VHDL code, and want to help
Update : 2025-02-17 Size : 1.66mb Publisher : 王涛
[Embeded-SCM Develop] i2s_interface.tar DL : 0: opencore里面的 i2s的VHDL硬件源代码，-The VHDL hardware i2s source code,
Update : 2025-02-17 Size : 240kb Publisher : 陈达燕
[Software Engineering] i2s_interface DL : 0: i2S inteface vhdl source code
Update : 2025-02-17 Size : 265kb Publisher : ZES
[Multimedia program] i2s_interface_latest.tar DL : 0: I2S-Schnittstelle f黵 Audio
Update : 2025-02-17 Size : 501kb Publisher : babela
[Voice Compress] i2sparalell_latest.tar DL : 0: 音频芯片的i2s格式，用vhdl编程，在quartus ii上汇编并且可综合-I2s format audio chip, with vhdl programming, the compilation in quartus ii and can be integrated
Update : 2025-02-17 Size : 4kb Publisher : tanglei
[VHDL-FPGA-Verilog] i2s_interface DL : 0: - I2S top level test bench. Two transmitters and two receivers are instantiated, one each in slave and master mode. Test result is displayed in the log window, there should be no errors.-- I2S top level test bench. Two transmitters and two receivers are instantiated, one each in slave and master mode. Test result is displayed in the log window, there should be no errors.
Update : 2025-02-17 Size : 515kb Publisher : Shahzad
[VHDL-FPGA-Verilog] I2C DL : 0: I2S interface in VHDL
Update : 2025-02-17 Size : 842kb Publisher : Markus_Withfather
[VHDL-FPGA-Verilog] i2s_to_parallel DL : 0: wm8731音频采集芯片的I2S采集时序的vhdl实现。-wm8731 I2S audio capture chip timing acquisition vhdl implementation.
Update : 2025-02-17 Size : 2kb Publisher : 熊晓涵
[Audio program] I2S DL : 0: 此设计主要是完成音频I2S格式数据流的串并转换和并串转换,用VHDL描述-This design is to complete the audio I2S format data stream serial to parallel conversion and parallel to serial conversion in VHDL
Update : 2025-02-17 Size : 5kb Publisher :
[VHDL-FPGA-Verilog] i2s_latest DL : 0: Details Name: i2s Created: Mar 22, 2004 Updated: Jan 10, 2014 SVN Updated: Mar 10, 2009 SVN: Browse Latest version: download Statistics: View Other project properties Category: Communication controller Language: VHDL Development status: Additional info: Design done WishBone Compliant: No License:
Update : 2025-02-17 Size : 5kb Publisher : chen
[VHDL-FPGA-Verilog] i2s_interface_latest.tar DL : 0: i2s 接口的vhdl实现，可用于FPGA(i2s interface with VHDL)
Update : 2025-02-17 Size : 501kb Publisher : dandanwinnie