Search - VHDL PWM motor

[VHDL-FPGA-Verilog] vcpwmcpldcar

Description: vc++与vhdl代码,cpld接受pc串口指令,输出pwm信号控制伺服电机.双通道,各128级.使用了扩展ascii码-vc++ with VHDL code, cpld accept pc serial commands, the output pwm signal to control servo motor. dual-channel, the 128. the use of extended ascii code
Platform: | Size: 959488 | Author: hxf | Hits:

[VHDL-FPGA-Verilog] PWM_DCmotorControl

Description: 基于VHDL的直流电机的PWM控制程序。-The VHDL-based DC motor PWM control procedures.
Platform: | Size: 193536 | Author: luoqianyou | Hits:

[VHDL-FPGA-Verilog] PWM

Description: Core_PWM,verilog语言编写，可用于电机驱动-Core_PWM, verilog language, can be used for motor drive
Platform: | Size: 5007360 | Author: zhan | Hits:

[VHDL-FPGA-Verilog] PWM

Description: Core_PWM,verilog语言编写，可用于电机驱动-Core_PWM, verilog language, can be used for motor drive
Platform: | Size: 2048 | Author: zhan | Hits:

[VHDL-FPGA-Verilog] cpld-pwm

Description: 基于cpld的pwm控制设计采用vhdl.verilog语言设计对大家比较有用-CPLD-based control design uses the pwm design vhdl.verilog language more useful for everyone
Platform: | Size: 79872 | Author: emily | Hits:

[VHDL-FPGA-Verilog] SVPWM

Description: 这是一个对电机进行SVPWM调速控制的VHDL源代码程序,包括了rtl主程序和测试sim仿真程序-This is a motor SVPWM Speed VHDL source code control procedures, including the main program and test rtl simulation program sim
Platform: | Size: 13312 | Author: 杨国超 | Hits:

[VHDL-FPGA-Verilog] CPLD_Design_50

Description: CPLD实用设计50例，非常经典的CPLD设计，包含50个实际的典型应用，涉及直流电机PWM驱动，编码等内容，有了这50例，举一反三，就会了很多应用-50 cases of practical CPLD design, very classic CPLD design, including 50 typical practical applications, involving PWM DC motor driver, coding, etc., with these 50 cases, giving top priority will be a lot of applications
Platform: | Size: 7625728 | Author: 刘工 | Hits:

[VHDL-FPGA-Verilog] PWMVHDL

Description: 电机控制中PWM波产生的程序，VHDL语言实现-Motor Control PWM wave generated by the procedure, VHDL language
Platform: | Size: 166912 | Author: wg | Hits:

[VHDL-FPGA-Verilog] FPGA-basedMotorControl

Description: 基于FPGA的电机控制 FPGA-basedMotorControl-FPGA-based motor control FPGA-basedMotorControl
Platform: | Size: 63488 | Author: 朱明 | Hits:

[VHDL-FPGA-Verilog] moter

Description: VHDL写的PWM发生器，仿真通过，波形基本完美，可以用于直流电机的控制-PWM generator written in VHDL, simulation is passed, the basic waveform perfect, can be used for DC motor control
Platform: | Size: 897024 | Author: dansen | Hits:

[VHDL-FPGA-Verilog] PWM_control_motor

Description: This a project about PWM. Application in motor speed control-This is a project about PWM. Application in motor speed control
Platform: | Size: 737280 | Author: nguyen hung | Hits:

[VHDL-FPGA-Verilog] VHDL

Description: PWM控制就是产生一定周期，占空比不同的方波信号，当占空比较大时，电机转速较高，否则电机转速较低。当采用FPGA产生PWM波形时，只需FPGA内部资源就可以实现，数字比较器的一端接设定值输出，另一端接线性递增计数器输出。当线性计数器的计数值小于设定值时输出低电平，当计数器大于设定值时输出高电平，这样就可通过改变设定值，产生占空比不同的方波信号，从而达到控制直流电机转速的目的。直流电机控制电路主要由2部分组成，如图1所示：  FPGA中PWM脉宽调制信号产生电路；  FPGA中正/反转方向控制电路 -PWM control is a certain cycle, a different duty cycle square wave signal, when the duty cycle is high, higher motor speed, or lower motor speed. When the PWM waveform generated using FPGA, the FPGA internal resources only can be achieved, the figure one comparator output termination setting, the other linear incremental counter output termination. When the value of linear counter output is less than low-level settings, when the counter output is greater than high settings, so that by changing the settings can produce different duty cycle square wave signal, DC motor control to achieve the purpose of speed. DC motor control circuit mainly by 2 parts, as shown in Figure 1:  FPGA in the PWM pulse width modulation signal generator circuit Chiang Kai-shek  FPGA/reverse direction control circuit
Platform: | Size: 37888 | Author: 袁玉佳 | Hits:

[VHDL-FPGA-Verilog] PWM

Description: 实现PWM波的产生,可用于电机控制.可以改变其占空比及频率来实现电机的调速.-Realization of PWM wave generation, can be used for motor control. Can change its duty cycle and frequency to achieve the speed control motor.
Platform: | Size: 436224 | Author: 宋瑞鹏 | Hits:

[VHDL-FPGA-Verilog] EP1C3_12_1_2_MOTO

Description: 基于FPGA的直流电机的PWM控制和步进电机的细分驱动控制。使用VHDL语言编写，压缩包里是Quartus下的工程。-FPGA-based PWM DC motor control and stepper motor-driven control of a breakdown. The use of VHDL language, compression bag is under the Quartus project.
Platform: | Size: 1193984 | Author: deadtomb | Hits:

[VHDL-FPGA-Verilog] servo_module_worked

Description: verilog pwm to control servo motor on quartus
Platform: | Size: 21504 | Author: frankie | Hits:

[Software Engineering] New_Stepper_Motor_Drive_Circuit

Description: 本课题设计了一款用于两相混合式步进电机的驱动芯片，内部集成了PWM(脉冲宽度调制)斩波控制和步进电机细分驱动功能，工作于36V并可持续输出1.5A 电流。PWM电流控制电路与3位非线性数模转换器相结合，可细分电机绕组上的电流，对步进电机进行整步、半步、1/4步或1/8步的细分控制，从而实现了步进电机不同步距角的运作。为了改善电机性能，特别是电机工作在微步距模式下的正弦电流波形下时，芯片可提供三种不同的电流衰减模式（快衰减模式、慢衰减模式、混合衰减模式）。同时，芯片内部的保护电路可实现过热关断和欠压锁定。-New Stepper Motor Drive Circuit
Platform: | Size: 1684480 | Author: 孙文 | Hits:

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[VHDL-FPGA-Verilog] vcpwmcpldcar

[VHDL-FPGA-Verilog] PWM_DCmotorControl

[VHDL-FPGA-Verilog] PWM

[VHDL-FPGA-Verilog] PWM

[VHDL-FPGA-Verilog] cpld-pwm

[VHDL-FPGA-Verilog] SVPWM

[VHDL-FPGA-Verilog] CPLD_Design_50

[VHDL-FPGA-Verilog] PWMVHDL

[VHDL-FPGA-Verilog] FPGA-basedMotorControl

[VHDL-FPGA-Verilog] moter

[VHDL-FPGA-Verilog] PWM_control_motor

[VHDL-FPGA-Verilog] VHDL

[VHDL-FPGA-Verilog] PWM

[VHDL-FPGA-Verilog] EP1C3_12_1_2_MOTO

[VHDL-FPGA-Verilog] servo_module_worked

[Software Engineering] New_Stepper_Motor_Drive_Circuit

[VHDL-FPGA-Verilog] PWM

[VHDL-FPGA-Verilog] pwm

[VHDL-FPGA-Verilog] statemation-for-PWM-

[VHDL-FPGA-Verilog] PWM-DCMotor-Control-based-on-VHDL

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