Description: 该代码是用VHDL编写的用以实现5/3无损小波变换。压缩包内附有详细的说明。-the VHDL code is used to prepare for the realization of the 5 / 3 wavelet transform prejudice. Compression packet containing a detailed explanation. Platform: |
Size: 3304303 |
Author:黄飞 |
Hits:
Description: 该代码是用VHDL编写的用以实现5/3无损小波变换。压缩包内附有详细的说明。-the VHDL code is used to prepare for the realization of the 5/3 wavelet transform prejudice. Compression packet containing a detailed explanation. Platform: |
Size: 3304448 |
Author:黄飞 |
Hits:
Description: 小波变换的VHDL代码,内带正变换逆变换的测试文件。-Wavelet transform VHDL code, with a positive transformation within the inverse transform of the test file. Platform: |
Size: 18432 |
Author:Janee |
Hits:
Description:
This file with the wavelet transf
Mallat implementation of wavelet
Verilog hdl code modules for radi
Modelsim 6.6 crack, can be used f
A written using Verilog DDR2 cont
Simple CPU VHDL implementation an
Dual-port RAM design, using Veril
Verilog language, a hardware-base
FPGA embedded project combat, Man
Application FPGA, FPGA-chip hardw
Mallat implementation of wavelet
Layer of one-dimensional wavelet Platform: |
Size: 1852416 |
Author:sansfroid |
Hits: