Search - VHDL hdb3

[ELanguage] hdb3

Description: 在VHDL平台上实现HDB3编码的源程序已调试完
Platform: | Size: 1337 | Author: 王晓鹏 | Hits:

[Other resource] hdb3

Description: HDB3码的VHDL实现共三个模块：插入V、插入B以及单双极性变换
Platform: | Size: 1178 | Author: Xingzhi | Hits:

[VHDL-FPGA-Verilog] hdb3 decoder

Description: 我上期做的VHDL设计方案，用于在FPGA或CPLD中实现HDB3的编码-I do view on the VHDL design options for the CPLD or FPGA to achieve HDB3 code
Platform: | Size: 119808 | Author: 王薇 | Hits:

Description: 源于老师的作业,实现将01代码转化成HDB3码,另外还有用VHDL语言编的,不过我这没有-teachers from the operations, achieving 01 HDB3 code into the code, as well as using VHDL series, but I am not
Platform: | Size: 38912 | Author: 王原 | Hits:

[VHDL-FPGA-Verilog] hdb3_VHDL

Description: hdb3 using language VHDL-Indoor using VHDL language
Platform: | Size: 54272 | Author: 王锋 | Hits:

[VHDL-FPGA-Verilog] hdb3

Description: hDB3的编解码模块是在maxplusII 下验证过的并且下到片子中都正确 -HDB3 codec module is tested under maxplusII and down to the film are correct
Platform: | Size: 3072 | Author: duan | Hits:

[Other] hdb3_proc

Description: HDB3编解码，含时钟提取，极高的效率和可靠性，VHDL。-HDB3 coding and decoding, including clock extraction, high efficiency and reliability, VHDL.
Platform: | Size: 4096 | Author: BrivaMa | Hits:

[ELanguage] hdb3

Description: 在VHDL平台上实现HDB3编码的源程序已调试完-In VHDL realize HDB3 encoding platform has been the source debugging End
Platform: | Size: 1024 | Author: 王晓鹏 | Hits:

[VHDL-FPGA-Verilog] hdb3

Description: HDB3码的VHDL实现共三个模块：插入V、插入B以及单双极性变换-VHDL code HDB3 realize a total of three modules: Insert V, insert B, as well as single-and double-polar transform
Platform: | Size: 1024 | Author: Xingzhi | Hits:

[matlab] HDB3

Description: HDB3码的编码，图形，功率谱密度。用于通信原理教学等-Code HDB3 coding, graphics, power spectral density. Communication Theory for teaching
Platform: | Size: 1024 | Author: 连自锋 | Hits:

[VHDL-FPGA-Verilog] hdb3

Description: vhdl语言实现的hdb3编解码的功能，已完成调试。-vhdl
Platform: | Size: 1024 | Author: 王英超 | Hits:

[VHDL-FPGA-Verilog] hdb3

Description: 实现了用vhdl语言完成在编码过程中的插B功能，-vhdl hdb3
Platform: | Size: 1024 | Author: 王英超 | Hits:

[Software Engineering] HDB3

Description: 实现HDB3编码,使用VHDL语言，-1用01表示，1用10表示，0用00表示。-The realization of HDB3 encoding, the use of VHDL language, 01 indicated by-1, 1, 10, said that the 0 with 00.
Platform: | Size: 273408 | Author: zhangzhen | Hits:

[ELanguage] hdb3

Description: 基于vhdl的hdb3编译码器的设计与实现-hdb3
Platform: | Size: 236544 | Author: fdfilkj | Hits:

[VHDL-FPGA-Verilog] HDB3

Description: VHDL语言编写的HDB3码的编译码模块-VHDL language code HDB3 codec module
Platform: | Size: 439296 | Author: 容蓉 | Hits:

[VHDL-FPGA-Verilog] HDB3_coder

Description: 实现了将64K低速NRZ码复接成2.048M高速HDB3码及其解复接过程，同时还用同步状态机剔除假同步和假失步的状态 -Achieved the 64K low-speed NRZ code 2.048M into high-speed multiplexing and demultiplexing HDB3 code then the process also removed using false synchronous state machine synchronization and false out-of-step state
Platform: | Size: 3148800 | Author: 陈涛 | Hits:

[VHDL-FPGA-Verilog] HDB3

Description: HDB3编码器与译码 HDB3编码器与译码-HDB3 encoder and decoder
Platform: | Size: 266240 | Author: 一天 | Hits:

[VHDL-FPGA-Verilog] HDB3

Description: HDB3编解码过程，本代码用vhdl语言书写，重现了HDB3编解码的详细过程。相信对广大写硬件语言的朋友有好处-HDB3 code and decode
Platform: | Size: 1024 | Author: yuandingbo | Hits:

[VHDL-FPGA-Verilog] HDB3(2)

Description: 利用vhdl编写实现数字基带传输HDB3码解码程序-vhdl hdb3 decode
Platform: | Size: 2048 | Author: kid | Hits:

[VHDL-FPGA-Verilog] HDB3

Description: 按照要求对“数字基带信号HDB3译码器设计与建模”进行逻辑分析，了解HDB3译码器译码原理，了解各模块电路的逻辑功能，设计通信系统框图，画出实现电路原理图，编写VHDL语言程序，上机调试、仿真，记录实验结果波形，对实验结果进行分析。(In accordance with the requirements of the logical analysis of the design and modeling of the digital baseband signal HDB3 decoder, HDB3 decoder principle, understand the logic function of each module circuit diagram, communication system design, draw the circuit principle diagram, VHDL language program, debugging, simulation, experimental results recorded waveform, the analysis of experimental results.)
Platform: | Size: 8990720 | Author: Remrinrin | Hits:

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[ELanguage] hdb3

[Other resource] hdb3

[VHDL-FPGA-Verilog] hdb3 decoder

[Algorithm] HDB3

[VHDL-FPGA-Verilog] hdb3_VHDL

[VHDL-FPGA-Verilog] hdb3

[Other] hdb3_proc

[ELanguage] hdb3

[VHDL-FPGA-Verilog] hdb3

[matlab] HDB3

[VHDL-FPGA-Verilog] hdb3

[VHDL-FPGA-Verilog] hdb3

[Software Engineering] HDB3

[ELanguage] hdb3

[VHDL-FPGA-Verilog] HDB3

[VHDL-FPGA-Verilog] HDB3_coder

[VHDL-FPGA-Verilog] HDB3

[VHDL-FPGA-Verilog] HDB3

[VHDL-FPGA-Verilog] HDB3(2)

[VHDL-FPGA-Verilog] HDB3

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