Welcome！[Sign In] ！[Sign Up]！
Front-page it | Collect it | [中国-简体中文]
FAQ Fav
Location:
Search - VHDL key expansion

Search list

[Other resource] AEScoremodules

Description: AES decoder aes_dec.vhdl AES encoder aes_enc.vhdl Package used by rest of design aes_pkg.vhdl Key Expansion component for AES encoder and decoder key_expansion.vhdl -AES AES encoder decoder aes_dec.vhdl aes_ enc.vhdl Package used by rest of design aes_pkg . vhdl Key Expansion component for a AES encoder nd decoder key_expansion.vhdl
Platform: | Size: 10174 | Author: 孟轲敏 | Hits:

[VHDL-FPGA-Verilog] AEScoremodules

Description: AES decoder aes_dec.vhdl AES encoder aes_enc.vhdl Package used by rest of design aes_pkg.vhdl Key Expansion component for AES encoder and decoder key_expansion.vhdl -AES AES encoder decoder aes_dec.vhdl aes_ enc.vhdl Package used by rest of design aes_pkg . vhdl Key Expansion component for a AES encoder nd decoder key_expansion.vhdl
Platform: | Size: 10240 | Author: 许茹芸 | Hits:

[VHDL-FPGA-Verilog] ps2_keyboard

Description: ps2 keyboard verilog源代码,支持ascii码.扫描码输出,扩展键输出,按下及释放信息输出-ps2 keyboard verilog source code, to support the ascii code. scan code output, the expansion of key output, press and release the information output
Platform: | Size: 5120 | Author: 李志刚 | Hits:

[Crack Hack] aes_crypto_core_latest.tar

Description: Consecutive AES core Description of project.. Features - AES encoder - 128/192/256 bit - AES decoder - 128/192/256 bit Status - Key Expansion added - Encoder added - Decoder added - Documentation added
Platform: | Size: 961536 | Author: Arun | Hits:

[Crack Hack] rc5keyexp

Description: rc5 key expansion algorithm implementation in vhdl, using state machine too. use ieee papers for more detailed description
Platform: | Size: 2048 | Author: hatela | Hits:

[Program doc] key_expansion.vhdl

Description: key expansion code for vhdl in advanced encryption standard
Platform: | Size: 2048 | Author: sruthi | Hits:

[VHDL-FPGA-Verilog] yyy

Description: 基于FPGA设计的电子密码锁是一个小型的数字系统，与普通机械锁相比，具有许多独特的优点：保密性好，防盗性强，可以不用钥匙，记住密码即可开锁等。目前使用的电子密码锁大部分是基于单片机技术，以单片机为主要器件。在实际应用中，程序容易跑飞，系统的可靠性较差。本文介绍的一种基于现场可编辑门阵列FPGA器件的电子密码锁的设计方法，采用VHDL语言对系统进行描述，并在EP3C10E144C8上实现。 通过仿真调试，利用可编程逻辑器件FPGA的电子密码锁的设计基本达到了预期目的。当然，该系统在一些细节的设计上还需要不断地完善和改进，特别是对系统的扩展有很好的使用系统和设计的价值。-The Report Of Electronic Code Lock Design Abstract：FPGA-based design of the electronic code lock is a small digital system. It has many unique advantages：good privacy and security , it do not need the key but remember password to unlock, and so on while it compare to ordinary mechanical locks. At present, the electronic code lock is most used of SCM technology .In practice, however, the process easy run to fly. So the reliability of this system is poor. The paper introduced a field programmable gate arrays FPGA devices to design electronic password lock. The VHDL language is used to describe the system and achieved in EP3C10E144C8. Though the simulation tests, using FPGA-based design of the electronic code lock can achieve the expected goal. Of course, some of the details of the system in the design of the need to constantly refined and improved, in particular the expansion of the system have a good design and practical value. Keyword: FPGA VHDL language electronic passw
Platform: | Size: 150528 | Author: zhu | Hits:

CodeBus www.codebus.net