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[Applications] pci局部总线开发者指南 DL : 0: pci局部总线开发者指南-PCI local bus Development Guide
Update : 2025-02-17 Size : 3.06mb Publisher : 周辉
[VHDL-FPGA-Verilog] pci_vhdl DL : 0: PCI的VHDL源码希望对大家有用！-PCI VHDL source hope useful for all!
Update : 2025-02-17 Size : 27kb Publisher : 林建加
[VHDL-FPGA-Verilog] pci 的vhdl 源代码 DL : 0: pci 的vhdl 源代码-The source code of PCI VHDL.
Update : 2025-02-17 Size : 3kb Publisher : 陈旭
[VHDL-FPGA-Verilog] PCI_144 DL : 1: -- PCI Target Interface Design for XC73144 -- -- Synopsys VHDL Solution using Xilinx XC7000 Library --- PCI Target Interface Design for XC73144---- Synopsys VHDL Solution using Xilinx XC7000 Library
Update : 2025-02-17 Size : 3kb Publisher : processor
[VHDL-FPGA-Verilog] PCIarbitration DL : 0: 这是PCI 仲裁机制的VHDL源码，它实现了PCI仲裁机制。-PCI arbitration mechanism VHDL source code, it achieved a PCI arbitration mechanism.
Update : 2025-02-17 Size : 3kb Publisher : 赵云
[VHDL-FPGA-Verilog] PCI_target DL : 0: VHDL编写的PCI代码,PCI2.2兼容,Xillinx Virtex与Spantan II 优化,33M主频,32位宽度,全目标功能等.-prepared by the PCI VHDL code, PCI2.2 compatible Xillinx Virtex II and Spantan optimized route speed, 32-bit width, the whole objective functions.
Update : 2025-02-17 Size : 825kb Publisher : citybus
[Software Engineering] pci-specification DL : 0: pci中文规范... 有需要的兄弟可以下载-pci Chinese ... there is a need to standardize the brothers can be downloaded
Update : 2025-02-17 Size : 1.08mb Publisher : flycash
[Embeded-SCM Develop] fpgapci DL : 0: 用vhdl编写的pci源代码。花了我2000多元钱买来的，编译通过！-with vhdl pci prepared by the source code. I spent more than 2,000 yuan to buy and compile!
Update : 2025-02-17 Size : 3kb Publisher : 王娟
[VHDL-FPGA-Verilog] cpu-leon3-gr-pci-xc2v3000 DL : 0: 一个使用VHDL设计的具有强大功能的32位CPU，这个文件包含了与之配套的PCI位码文件及配置程序。-A VHDL design with the use of powerful 32-bit CPU, this document contains a complete set of the PCI code files and configuration procedures.
Update : 2025-02-17 Size : 407kb Publisher : zhao onely
[Embeded-SCM Develop] PCI DL : 0: PCI局部总线的中文教程，可以加快你对PCI总线通讯协议的学习理解。-PCI Local Bus Guide in Chinese, you can speed up your PCI bus communication protocol of the study and understanding.
Update : 2025-02-17 Size : 1.12mb Publisher : 何风
[VHDL-FPGA-Verilog] PCI_VHDL DL : 0: 32位33M的PCI接口的VHDL实现，想深入学VHDL或实现PCI的可以看一看-32 of the PCI interface 33M realize VHDL, VHDL, or would like to realize in depth study could take a look at the PCI
Update : 2025-02-17 Size : 104kb Publisher : 缪德芳
[Other] PCI DL : 0: PCI设计指南The Xilinx LogiCORE PCI interface is a fully verified, pre-implemented PCI Bus interface. This interface is available in 32-bit and 64- bit versions, with support for multiple Xilinx FPGA device families. It is designed to support both Verilog-HDL and VHDL. The design examples in this book are provided in Verilog.-PCI Design Guide The Xilinx LogiCORE PCI interface is a fully verified, pre-implementedPCI Bus interface. This interface is available in 32-bit and 64-bit versions, with support for multiple Xilinx FPGA device families. Itis designed to support both Verilog-HDL and VHDL. The designexamples in this book are provided in Verilog.
Update : 2025-02-17 Size : 878kb Publisher : lee
[VHDL-FPGA-Verilog] PCI_Arbit_VHD_CPLD DL : 0: PCI Arbitor by VHDL -PCI Arbitor by VHDL
Update : 2025-02-17 Size : 4kb Publisher : Winsam Tung
[VHDL-FPGA-Verilog] PCI-IPcoreor1k[1] DL : 1: PCI的ip core，VHDL代码，希望对大家有帮助-PCI-ip core, VHDL code, we hope to help
Update : 2025-02-17 Size : 1.02mb Publisher : 李明
[Embeded-SCM Develop] plx9054-localbus-cpld-vhdl-src DL : 0: PLX 公司 PLX9054 pci target controller local bus interface vhdl programe-PLX inc. PLX9054 pci target controller local bus interface vhdl programe
Update : 2025-02-17 Size : 1kb Publisher : richardz
[Embeded-SCM Develop] pci.tar DL : 0: verilog编写的PCI总线，提供了Wishbone bus和PCI local bus之间的接口，内由两个独立的模块组成，分别完成WB BUS和PCI bus之间的传输-The PCI IP core (PCI bridge) provides an interface between the WISHBONE SoC bus and the PCI local bus. It consists of two independent units, one handling transactions originating on the PCI bus, the other one handling transactions originating on the WISHBONE bus.
Update : 2025-02-17 Size : 12.64mb Publisher : yemao
[Other] cpld-pci DL : 0: 使用 cpld实现pci的功能，思路较为简单方面，希望大家可以测试一下-Use cpld achieve pci functions, a relatively simple idea, the hope that we can test
Update : 2025-02-17 Size : 1kb Publisher : tiantian
[VHDL-FPGA-Verilog] VHDL-PCI DL : 0: PCI 源码 vhdl 非常好的东东哈哈 -PCI vhdl very good ！ haha haha haha
Update : 2025-02-17 Size : 27kb Publisher : 朱根生
[VHDL-FPGA-Verilog] Verilog-pci DL : 0: PCI的FPGA实现，使用verilog硬件描述语言模拟pci数据接口的数据传输过程。-PCI simulation with FPGA, using the verilog hardware describing language to simulate data transfer processes on pci data interface.
Update : 2025-02-17 Size : 5.25mb Publisher : zxc
[VHDL-FPGA-Verilog] PCI-dio DL : 0: 基于PCI的DIO接口程序，包括verilog源程序、驱动源程序以及寄存器说明文件-PCI-DIO-based interface program, including the verilog source code, driver source code and documentation register
Update : 2025-02-17 Size : 2.2mb Publisher : zifeng

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