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Platform: |
Size: 701440 |
Author: xiaojian |
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Description: USBHostSlave is a USB 1.1 host and Device IP core.
– Supports full speed (12Mbps) and low speed (1.5Mbps) operation.
– USB Device has four endpoints, each with their own independent FIFO.
– Supports the four types of USB data transfer control, bulk, interrupt, and isochronous
transfers.
– Host can automatically generate SOF packets.
– 8-bit Wishbone slave bus interface.
– FIFO depth configurable via paramters.-USBHostSlave is a USB 1.1 host and Device IP core.
– Supports full speed (12Mbps) and low speed (1.5Mbps) operation.
– USB Device has four endpoints, each with their own independent FIFO.
– Supports the four types of USB data transfer control, bulk, interrupt, and isochronous
transfers.
– Host can automatically generate SOF packets.
– 8-bit Wishbone slave bus interface.
– FIFO depth configurable via paramters.
Platform: |
Size: 6144 |
Author: polito |
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Description: 在高速的数据采集或传输中，目前使用较多的都是采用USB 2．0接口控制器和FPGA或DSP实现的，本设计在USB 2．0接口芯片CY7C68013的Slave FIFO模式下，利用FPGA作为外部主控制器实现对FX2 USB内部的FIFO进行控制，以实现数据的高速传输。该模块可普遍适用于基于USB 2．0接口的高速数据传输或采集中。-In the high-speed data acquisition or transmission, the currently used are based on more USB 2.0 interface controller and the FPGA or DSP implementation, the design USB 2.0 interface chip CY7C68013 of the Slave FIFO mode, the use of FPGA as a the external FX2 USB host controller to realize the internal FIFO control, in order to achieve high-speed data transmission. The module can be generally applied based on high-speed USB 2.0 interface, transfer or acquisition of data.
Platform: |
Size: 894976 |
Author: jiang_jennifer |
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Description: Project of Adquisition Data, show in VGA and send to usb host
Platform: |
Size: 9917440 |
Author: lagartojj |
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Description: 本工程包括FPGA程序和CY7C68013固件程序。
上位机程序通过EZ-USB CONTROL PANNEL 来测试。-The works include the FPGA programs and CY7C68013 firmware. Host computer procedure EZ-USB CONTROL PANNEL to test.
Platform: |
Size: 5125120 |
Author: zhaox |
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Description: In this example w ill interface the PS/2 port to a PS/2 keyboard, also known as
an AT keyboard. The example will not apply to the newer USB keyboards, or to the
older, obsolete XT keyboard. Keyboards contain their own microprocessors that
continually scan the keys and then send the resulting key pressings to the host – in our
case through the PS/2 port.-In this example we will interface the PS/2 port to a PS/2 keyboard, also known as
an AT keyboard. The example will not apply to the newer USB keyboards, or to the
older, obsolete XT keyboard. Keyboards contain their own microprocessors that
continually scan the keys and then send the resulting key pressings to the host – in our
case through the PS/2 port.
Platform: |
Size: 20480 |
Author: will |
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Description: de2 usb画笔
VGA显示-de2 usb pen VGA display ..............................
Platform: |
Size: 1619968 |
Author: 吴鹏 |
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Description: This code is the VHDL source code of the USB communication between FPGA device and host device(PC).
Platform: |
Size: 4096 |
Author: moritogenji |
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