Search - VITERBI DECODER IN VHDL

[Windows Develop] ViterbiFPGA

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Platform: | Size: 3784704 | Author: 鲁东旭 | Hits:

Description: 三篇关于Viterbi FPGA编译码器的优化设计文档： 1、Viterbi译码器的FPGA设计实现与优化.pdf 2、Viterbi译码器的低功耗设计.pdf 3、基于FPGA的高速并行Viterbi译码器的设计与实现.pdf-3 on the Viterbi FPGA optimization codecs design documents: 1, Viterbi decoder FPGA Design Implementation and Optimization. Pdf2, Viterbi decoder, low-power design. Pdf3, high-speed FPGA-based parallel Viterbi decoder Design and Implementation. pdf
Platform: | Size: 451584 | Author: helei_zju | Hits:

[VHDL-FPGA-Verilog] husw

Description: 用VHDL语言设计维特比解码器是VHDL原代码用ModelSim XE III 6.3c软件实现仿真-Language Design with VHDL Viterbi decoder is the VHDL source code with ModelSim XE III 6.3c software simulation
Platform: | Size: 1024 | Author: hsw0320 | Hits:

[Communication-Mobile] ViterbiDecoder

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Platform: | Size: 379904 | Author: Krupesh | Hits:

[VHDL-FPGA-Verilog] Viterbi_decoder

Description: Viterbi译码器的编解码器的设计用Verilog实现-Viterbi decoder。Verilog
Platform: | Size: 64512 | Author: 李风飞 | Hits:

[VHDL-FPGA-Verilog] viterbi

Description: viterbi decoder with convolutional encoder
Platform: | Size: 1389568 | Author: phani | Hits:

[Communication-Mobile] dafeldib2004

Description: In this document - decoder Viterbi on VHDL with low power architecture.
Platform: | Size: 1665024 | Author: Evgeny | Hits:

[Other] viterbi213

Description: 编码方式为213的Viterbi卷积码编码器和译码器的FPGA的实现，包含整个QuartusＩＩ的工程文件，解码方式为寄存器交换法-Encoding for the 213 convolutional code encoder and Viterbi decoder FPGA realization of the project file that contains the entire QuartusII, decoding method for the register exchange
Platform: | Size: 2668544 | Author: jenny | Hits:

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