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[source in ebook] 256点FFT源代码

Description: 256点FFT IP核。包括16bit和8bit两种精度和C、VHDL、Verilog三种语言的多版本、多精度的IP核
Platform: | Size: 352372 | Author: ykletter@163.com | Hits:

[VHDL-FPGA-Verilog] cf_fft_256_8

Description: This is a source code of 256 point fft architecture. This code is also available with opencores-This is a source code of 256 point fft architecture. This code is also available with opencores
Platform: | Size: 2048 | Author: Mohan | Hits:

[VHDL-FPGA-Verilog] 256fft

Description:
Platform: | Size: 209920 | Author: Nagendran | Hits:

[VHDL-FPGA-Verilog] fft_256

Description: 256点的fft，使用verilog硬件描述语言实现，可以在quartus等仿真软件仿真-failed to translate
Platform: | Size: 24576 | Author: Cxgu | Hits:

[VHDL-FPGA-Verilog] synth_fft

Description: fftprocessing can complete 256 pointsFFT.-Hardware Description Language(HDL)is an advanced electronic designmethod．After HDL was put into use，it has draw great attention and gained popularity．The design used Verilog HDL and Schematic for entry tools having good effect in the system design，Meanwhile，it adopted the core provided by Xilinx／nc. improving the design efficiency．The whole design which is implemented inXC2S600E device relied on ISE and advanced hierarchy design mind．Furthermore，it is simulated and verified．The frequency attains to 40.64MHz．this paper aims at demonstration the applying FPGA to FFT signal processing can complete 256 pointsFFT.
Platform: | Size: 56320 | Author: zzy | Hits:

[VHDL-FPGA-Verilog] fft16

Description: 256点的FFT/IFFT变换VERILOG代码核。-256-point FFT/IFFT transform VERILOG code that nuclear.
Platform: | Size: 6144 | Author: Solomon | Hits:

[VHDL-FPGA-Verilog] fft256_512_1024

Description: 基于基2的并行256，1024深度的FFT源代码verilog-Based on radix-2 FFT parallel 256,1024 depth verilog source code
Platform: | Size: 15360 | Author: tianshan | Hits:

[VHDL-FPGA-Verilog] pipelined_fft_256

Description: verilog编写的并行256点fft代码(Verilog prepared parallel 256 points fft code)
Platform: | Size: 221184 | Author: lionsde | Hits:

[Embeded-SCM Develop] pipelined_fft_64_128_256

Description: 用verilog实现64点，128点，256点的fft(64 points, 128 points, and 256 points FFT are implemented with Verilog)
Platform: | Size: 560128 | Author: zhanghao1139 | Hits:

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