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[Other resource] ethernet_tri_mode_rtl.tar

Description: 以太网控制器verilog，含有mac,mii接口
Platform: | Size: 37421 | Author: sunhuaiyi | Hits:

[SourceCode] mii to rmii代码

Description: mii 接口转rmii接口的verilog代码
Platform: | Size: 869 | Author: kimi09 | Hits:

[VHDL-FPGA-Verilog] Cpu_model

Description: Verilog HDL编写的CPU模型，很经典，比较通用-Verilog HDL prepared by the CPU model, classic, more generic
Platform: | Size: 1024 | Author: wyl | Hits:

[Mathimatics-Numerical algorithms] macmiim

Description: 一个关于以太网MAC核和介质无关接口的原代码,希望对大家有帮助!-an Ethernet MAC on the nuclear medium and unrelated to the original interface code, we want to help!
Platform: | Size: 61440 | Author: 王平 | Hits:

[VHDL-FPGA-Verilog] ethernet_tri_mode_rtl.tar

Description: 以太网控制器verilog，含有mac,mii接口-Ethernet controller verilog, containing mac, mii interface
Platform: | Size: 37888 | Author: | Hits:

[Internet-Network] smi_rw

Description: 基于IEEE802.3标准的SMII网络通信的VERILOG实现-IEEE802.3 standards-based network communication SMII realize Verilog
Platform: | Size: 1024 | Author: 李国 | Hits:

[SCM] ethernet.tar

Description: 10M/100M以太网ipcore，包括说明文档和整个源码-10M/100M Ethernet ipcore, including documentation and the source
Platform: | Size: 936960 | Author: 李达明 | Hits:

[VHDL-FPGA-Verilog] ethernet_controller_Verilog

Description: 以太网控制器源码，verilog语言,包含MAC、MII接口-Ethernet controller ,include MAC and MII interfaces ,by verilog
Platform: | Size: 71680 | Author: CL | Hits:

[VHDL-FPGA-Verilog] smii_latest.tar

Description: SMII接口的mac控制器，通过测试。使用verilog语言！-The Serial Media Independent Interface, SMMI, is a low pin count version of the MII normally used between ethernet MAC and PHY. The Serial Media Independent Interface (SMII) is designed to satisfy the following requirements: Convey complete MII information between a 10/100 PHY and MAC with two pins per port allow multi port MAC/PHY communications with one system clock Operate in both half and full duplex per packet switching between 10 Mbit and 100 Mbit data rates allow direct MAC to MAC communication
Platform: | Size: 1035264 | Author: weixin | Hits:

[VHDL-FPGA-Verilog] VHDL_MII_MAC

Description: 百兆以太网接口，verilog HDL,希望能对你有帮助。-verilog HDL， MII，ethernet，hope helpful to you。
Platform: | Size: 126976 | Author: wh | Hits:

[VHDL-FPGA-Verilog] MII

Description: 以太网MII芯片配置接口的VHDL设计，配置PHY芯片的模块设计-Ethernet MII chip configuration interface VHDL design, configuration PHY chip module design
Platform: | Size: 2048 | Author: 雷伟林 | Hits:

[VHDL-FPGA-Verilog] eth

Description: 用数字逻辑语言描述以太网，百兆以太网MAC和MII的verilog源码-With digital logic language to describe Ethernet
Platform: | Size: 123904 | Author: 胡封 | Hits:

[VHDL-FPGA-Verilog] 以太网控制器Verilog源码(含有MAC,MII接口)

Description: 以太网控制器Verilog源码(含有MAC,MII接口)(Ethernet controller Verilog source code (including MAC, MII interface))
Platform: | Size: 71680 | Author: 天地孤影i | Hits:

[VHDL-FPGA-Verilog] 以太网控制器Verilog源码(含有MAC,MII接口)

Description: 使用verilog语言完成MAC层代码的编写(Using the Verilog language to write the code of the MAC layer)
Platform: | Size: 108544 | Author: smil_2018 | Hits:

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