Search - Verilog image

[VHDL-FPGA-Verilog] entropy_coding

Description: 用verilog 描述的嫡编码(entropy coding) 应用于图像压缩编码有测试文档 -using Verilog His description of coding (entropy coding) for image compression test files are encoded
Platform: | Size: 19456 | Author: 周信均 | Hits:

[VHDL-FPGA-Verilog] run_length_coding

Description: 用verilog 编写应用于图像压缩编码中使用行程长度编码(run lengthencoding,RLE)对交流系数(Aa)进行编码。-using Verilog prepared for image compression coding using length encoding (run leng thencoding, RLE) on the exchange coefficient (Aa) coding.
Platform: | Size: 9216 | Author: 周信均 | Hits:

[VHDL-FPGA-Verilog] verilog_jpeg

Description: 用verilog 描写应用于数字图像压缩系统--jpeg 有测试文档-using Verilog description applied to digital image compression system-- a test jpeg files
Platform: | Size: 9216 | Author: 周信均 | Hits:

[Windows Develop] dct_mac

Description: dct verilog code for image -Extra Verilog code for image
Platform: | Size: 2048 | Author: zhang chi | Hits:

[Special Effects] ModelProjects

Description: 实现了图像处理的Verilog级，包含有七个主要文件-image processing to achieve the level of Verilog, contains seven key documents
Platform: | Size: 68608 | Author: 刘伟 | Hits:

[Video Capture] sampleverilog

Description: 图像采集、存储控制verilog源代码-Image acquisition, storage, control of Verilog source code
Platform: | Size: 241664 | Author: hjx | Hits:

[Graph Recognize] saa7113shipincaiji

Description: 视频图像采集verilog HDl源程序，视频解码芯片部分的，可以供参考-Video image acquisition verilog HDl source, part of the video decoder chip, you can for reference
Platform: | Size: 8192 | Author: 穆垚 | Hits:

[Other] RGB_color_transform_gray_level_co-design_of_C_and_

Description: to use verilog code and c to translate a RGB bmp image(512*512) to a gray level image -to use verilog code and c to translate a RGB bmp image (512* 512) to a gray level image
Platform: | Size: 701440 | Author: Annbb | Hits:

[2D Graphic] DE2_CCD_binary

Description: verilog DE2 binary image (form CCD to VGA) output
Platform: | Size: 4235264 | Author: eknngx | Hits:

[VHDL-FPGA-Verilog] webCam-FPGA

Description: 使用Verilog控制美光CMOS图像处理器，并转存到SDRAM中。使用FPGA为QL的带fuse系列-Control the use of Verilog Micron CMOS image processor and SDRAM in转存到. FPGA for use with QL series fuse
Platform: | Size: 36864 | Author: NOOW | Hits:

[VHDL-FPGA-Verilog] test_in

Description: 用Verilog编写的产生图像的程序，实现24位数据量产生图像使用DA转换后直接显示-Verilog prepared using the procedure for selecting the images to achieve 24-bit image data generated using the DA converter and directly show the
Platform: | Size: 1024 | Author: lvxingli | Hits:

[Video Capture] sram_saa1117verilog

Description: 图像采集、存储控制verilog源代码，fpga控制SAA1117,采集数据存储到sram，仿真编译测试都能通过-Image acquisition, storage, control verilog source code, fpga control SAA1117, collecting data to sram, simulation tests can be compiled by
Platform: | Size: 25600 | Author: 蹇清平 | Hits:

[source in ebook] Chapter1-5

Description: 第一章到第五章的代码本书通过100多个模块实例，详细地讲解了Verilog HDL程序设计语言，全书共分13章，内容涉及VerilogHDL语言基本概念、建模、同步设计、异步设计、功能验证等，实例包括各种加法器/计数器、乘法器/除法器、编码器/译码器、状态机、SPIMaster Controller、I2C Master controller、CAN ProtocolController、Memory模块、JPEG图像压缩模块、加密模块、ATA控制器、8位RISC-CPU等及各个实例模块相应的Testbench，所举实例具有很强的实用性和代表性，每个实例均给出了介绍、功能分析、程序代码和结果演示。-Chapter to Chapter V of the code in this book through more than 100 module instance, explain in detail the Verilog HDL programming language, the book is divided into 13 chapters, covering basic concepts VerilogHDL languages, modeling, synchronous design, asynchronous design, function authentication, etc. Examples include a variety of adder/counter, multiplier/divider, encoders/decoders, state machines, SPIMaster Controller, I2C Master controller, CAN ProtocolController, Memory modules, JPEG image compression module, encryption module, ATA controller, 8-bit RISC-CPU, etc. and the various instances of the corresponding module Testbench, The examples are highly practical and representation, each instance of it all gives the introduction, functional analysis, program code and results presentation.
Platform: | Size: 1580032 | Author: xiao | Hits:

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[VHDL-FPGA-Verilog] entropy_coding

[VHDL-FPGA-Verilog] run_length_coding

[VHDL-FPGA-Verilog] verilog_jpeg

[Windows Develop] dct_mac

[Special Effects] ModelProjects

[Video Capture] sampleverilog

[Graph Recognize] saa7113shipincaiji

[Other] RGB_color_transform_gray_level_co-design_of_C_and_

[2D Graphic] DE2_CCD_binary

[VHDL-FPGA-Verilog] webCam-FPGA

[VHDL-FPGA-Verilog] test_in

[Video Capture] sram_saa1117verilog

[source in ebook] Chapter1-5

[VHDL-FPGA-Verilog] VERILOG-jpeg

[VHDL-FPGA-Verilog] 2005-12-29_22-34-9_93

[Compress-Decompress algrithms] inter_prediction(verilog)

[Compress-Decompress algrithms] intra(verilog)

[Compress-Decompress algrithms] iqit(verilog)

[VHDL-FPGA-Verilog] codeFPGA

[Graph program] Verilog--image-sample

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