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[Other resource] BRAM2DRAM

Description: FPGA内嵌的BRAM资源很少，此代码为DRAM代码风格，可以极大程度上减少FPGA内嵌资源的消耗。txt文档中含源代码，直接粘成vhdl即可
Platform: | Size: 2104 | Author: 苗苗 | Hits:

[VHDL-FPGA-Verilog] BRAM2DRAM

Description: FPGA内嵌的BRAM资源很少，此代码为DRAM代码风格，可以极大程度上减少FPGA内嵌资源的消耗。txt文档中含源代码，直接粘成vhdl即可-FPGA embedded BRAM few resources, the code for the DRAM code style, you can significantly reduce resource consumption embedded FPGA. txt document containing the source code directly into VHDL can be sticky
Platform: | Size: 2048 | Author: 苗苗 | Hits:

[Other] lab4mb

Description: 创建基本应用程序，本实验指导我们通过处理器创建一个基本的应用程序。应用程序将 控制Spartan-3E starter kit上的LEDs。 你将添加一个 OPB BRAM 控制器，和修改OPB BRAM中原有的连接部分插入文本。最后你将会发现系统就像你当初设计的一样运行。
Platform: | Size: 1856512 | Author: jie | Hits:

[SCM] TargetingMicroBlazeontheSpartan2

Description:
Platform: | Size: 1892352 | Author: wyxhehe | Hits:

[VHDL-FPGA-Verilog] pcfg

Description: ISE file VHDL code about the comunication from PC to kit in process writing and reading from BRAM in kit
Platform: | Size: 7273472 | Author: Rakhun | Hits:

[VHDL-FPGA-Verilog] bram_block_0_wrapper

Description: 赛灵思FPGA开发板上BRAM模块VHDL源代码，可作为硬件设计参考资料！-Xilinx FPGA development board BRAM module VHDL source code, hardware design can be used as reference!
Platform: | Size: 1024 | Author: dc | Hits:

[VHDL-FPGA-Verilog] 3Channel_CIS_Processor_with-VHDL.ZIP

Description: This usefull source for control CIS Sensor and has fallowed functions 1) Read image data frome 3channel 200dpi CIS Sensor 2)Encoder Sync Technoledge for more high resolution analiysys with shared the time divition 3)Psudo Video Ram Read by using Xilinx BRAM 4)MCU Bidirectioal data Transfer 5) ADC data Converting -This is usefull source for control CIS Sensor and has fallowed functions 1) Read image data frome 3channel 200dpi CIS Sensor 2)Encoder Sync Technoledge for more high resolution analiysys with shared the time divition 3)Psudo Video Ram Read by using Xilinx BRAM 4)MCU Bidirectioal data Transfer 5) ADC data Converting
Platform: | Size: 15360 | Author: jeong | Hits:

[VHDL-FPGA-Verilog] 61i_dp_bram_v5_0_vhdl_ise

Description: BRAM IN VHDL+ISE Xilinx
Platform: | Size: 16384 | Author: rocky | Hits:

[Windows Develop] FBRAAM2DRAAMP

Description: FPGA内嵌的BRAM资源非常少，此代码为DRAM代码风格，能极大程度度上减少FPGA内嵌资源的消耗。txt文档中含源代码，直接粘成vhdl即可 -The FPGA embedded BRAM very few resources, this code to DRAM code style can reduce FPGA embedded resource consumption greatly degrees. txt document containing the source code directly stick into vhdl can
Platform: | Size: 2048 | Author: zzhp2010 | Hits:

[Other] VHDLAC97

Description: using VHDL language, 是一个用AC97 控制LM4550的系统，可以real-time读听，如果需要录音功能可以直接加一个BRam-VHDL real-time writing-reading system
Platform: | Size: 2111488 | Author: mango | Hits:

[Other] xapp1151_Param_CAM

Description: Xilinx基于BRAM的CAM的实现，使用vhdl语言。-The realization of CAM.
Platform: | Size: 120832 | Author: 张文德 | Hits:

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