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[VHDL-FPGA-Verilog] labsolutions

Description: Xilinx的培训教程的源码 virtex-Xilinx training guides source virtex
Platform: | Size: 14724096 | Author: jihuijie | Hits:

[matlab] fir_core

Description: fir滤波器，用matlab，dsp和quartus2设计的-fir filter, using Matlab, dsp design and quartus2
Platform: | Size: 95232 | Author: 吴涛 | Hits:

[VHDL-FPGA-Verilog] ip_fft128

Description: 128点fft的IP核vhdl源代码，另有其控制代码。-128 point fft s IP core VHDL source code, while its control code.
Platform: | Size: 7168 | Author: 戈立军 | Hits:

[Streaming Mpeg4] dsp48macro_macfir

Description: xilinx embedded system: FIR design example.
Platform: | Size: 29696 | Author: ylwang | Hits:

[SCM] PBLCD

Description: FPGA 基于PICOBLAZE内核的LCD显示程序,完整,XILINX-PicoBlaze core FPGA-based LCD display program, complete, XILINX
Platform: | Size: 634880 | Author: 鲍纯贝 | Hits:

[VHDL-FPGA-Verilog] VHDL-XILINX-EXAMPLE26

Description: [VHDL经典设计26例]--在xilinx芯片上调试通过--[01--1位全加器][02--2选1多路选择器][03--8位硬件加法器][04--7段数码显示译码器][05--8位串入并出寄存器][6--8位并入串出寄存器][7--内部三态总线][8--含清零和同步时钟使能的4位加法计数器][9--数控分频器][10--4位十进制频率计][11--译码扫描显示电路][12--用状态机实现序列检测器的设计][13--用状态机对ADC0832电路控制实现SIN函数发生器][14--用状态机实现ADC0809的采样电路设计][15--DMA方式A/D采样控制电路设计][16--硬件电子琴][17--乐曲自动演奏][18--秒表][19--移位相加8位硬件乘法器][20--VGA图像显示控制器(彩条)][21--VGA图像显示控制器][22--等精度频率计][23--模拟波形发生器][24--模拟示波器][25--通用异步收发器(UART)][26--8位CPU设计(COP2000)]
Platform: | Size: 3687424 | Author: hawd | Hits:

[VHDL-FPGA-Verilog] Stage3_3175133_Zhang

Description: 用MATLAB里的XILINX BLOCKS, 支持FPGA算法, 实现X_NEXT = ((n-1)x+ A/x(n-1)次)/n
Platform: | Size: 28672 | Author: zhang tian | Hits:

[VHDL-FPGA-Verilog] Stage3_Library

Description: 用MATLAB里的XILINX BLOCKS编写, 做嵌入式用的2个BLOCKS, 一个为除法BLOCK, 另一个为乘方BLOCK.-Using MATLAB in the XILINX BLOCKS prepared to do embedded with the 2 BLOCKS, a division BLOCK, another for the involution BLOCK.
Platform: | Size: 10240 | Author: zhang tian | Hits:

[VHDL-FPGA-Verilog] Fibonacci_sequence

Description: 用MATLAB 里的XILINX BLOCKS编写, 实现Fibonacci sequence算法, 当F为0时, 输出为0 F为1时, 输出为1 当F为N 时, 输出为F的N-1 加上 F的N-2.-Using MATLAB in the XILINX BLOCKS prepared realize Fibonacci sequence algorithm, when F is 0, the output for 0 F for one, the output is 1 when F is N, the output for the F of the N-1 plus F of N-2 .
Platform: | Size: 25600 | Author: zhang tian | Hits:

[Wavelet] conv5x5_matlab_jtag_XUP_hw_in_loop

Description: Xilinx MATLAB、SysGen的 图像 DCT工程-Xilinx MATLAB, SysGen image DCT works
Platform: | Size: 72704 | Author: xiaowei | Hits:

[matlab] filter

Description: 这是基于MATLAB下的XILINX的FPGA的FIR滤波器的模型设计文件-This is a MATLAB-based FPGA of the XILINX Model of the FIR filter design documents
Platform: | Size: 268288 | Author: xueanxi | Hits:

[Other] DUC

Description: 基于软件无线电的SFF平台，采用Xilinx System Generator实现的数字上变频器-SFF platform based on software radio, using Xilinx System Generator to achieve digital upconverter
Platform: | Size: 53248 | Author: 刘荣毅 | Hits:

[Other] demodulateur_FM2

Description: FM demodulator with dsp tools xilinx system generetor for dsp.
Platform: | Size: 19456 | Author: elhaouari44 | Hits:

[VHDL-FPGA-Verilog] Xilinx-FIR

Description: 基于Xilinx FPGA实现的系数可装载数字滤波器源代码-Configurable Digital Filter Based on FPGA (using Verilog under Matlab 2008a)
Platform: | Size: 3090432 | Author: 胡文静 | Hits:

[Other] Xilinx_ISE_11.1_licgen_v3

Description: xilinx_ise 11.1 破解，这个版本支持V5的器件，V2一下不支持-Xilinx_ISE_11.1_licgen
Platform: | Size: 528384 | Author: 高重阳 | Hits:

[Linux-Unix] Xilinx_Speedway_EDK11

Description: TRAINING ISE XILINX 11.1-TRAINING ISE XILINX 11.1
Platform: | Size: 23839744 | Author: THEZOOZ | Hits:

[Linux-Unix] Xilinx_ISE_FPGA

Description: TRAININ xilinx ISE 11.1-TRAININ xilinx ISE 11.1
Platform: | Size: 43082752 | Author: THEZOOZ | Hits:

[DSP program] OFDM_Security

Description: This a Simulink model that demonstrates an algorithm that applies wireless security on physical layer. The demonstration is based on 802.11a (simplified) and receiver is implemented on Xilinx Virtex 4 FPGA. The RAR file inlcudes 2 files: 1. Simulink model 2. initialization file. Software requirements: 1. Matlab, r2007a or later 2. Simulink with DSP and Comm blocksets 3. Xilinx ISE with System Generator for DSP 9.2i or later.
Platform: | Size: 160768 | Author: 徐滨 | Hits:

[Software Engineering] Xilinx-ISE-11.1-Synthesis-Tutorial

Description: Xilinx ISE 11.1 Synthesis Tutorial
Platform: | Size: 2683904 | Author: giau | Hits:

[matlab] Gps-receiver-using-xilinx-fpga-and-ti-dsp-in-matl

Description: Gps receiver using xilinx fpga and ti dsp in matlab
Platform: | Size: 3233792 | Author: liu | Hits:
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