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Xilinx的培训教程的源码 virtex-Xilinx training guides source virtex
Update : 2025-02-19 Size : 14.04mb Publisher : jihuijie

DL : 0
fir滤波器,用matlab,dsp和quartus2设计的-fir filter, using Matlab, dsp design and quartus2
Update : 2025-02-19 Size : 93kb Publisher : 吴涛

128点fft的IP核vhdl源代码,另有其控制代码。-128 point fft s IP core VHDL source code, while its control code.
Update : 2025-02-19 Size : 7kb Publisher : 戈立军

xilinx embedded system: FIR design example.
Update : 2025-02-19 Size : 29kb Publisher : ylwang

DL : 0
FPGA 基于PICOBLAZE内核的LCD显示程序,完整,XILINX-PicoBlaze core FPGA-based LCD display program, complete, XILINX
Update : 2025-02-19 Size : 620kb Publisher : 鲍纯贝

[VHDL经典设计26例]--在xilinx芯片上调试通过--[01--1位全加器][02--2选1多路选择器][03--8位硬件加法器][04--7段数码显示译码器][05--8位串入并出寄存器][6--8位并入串出寄存器][7--内部三态总线][8--含清零和同步时钟使能的4位加法计数器][9--数控分频器][10--4位十进制频率计][11--译码扫描显示电路][12--用状态机实现序列检测器的设计][13--用状态机对ADC0832电路控制实现SIN函数发生器][14--用状态机实现ADC0809的采样电路设计][15--DMA方式A/D采样控制电路设计][16--硬件电子琴][17--乐曲自动演奏][18--秒表][19--移位相加8位硬件乘法器][20--VGA图像显示控制器(彩条)][21--VGA图像显示控制器][22--等精度频率计][23--模拟波形发生器][24--模拟示波器][25--通用异步收发器(UART)][26--8位CPU设计(COP2000)]
Update : 2025-02-19 Size : 3.52mb Publisher : hawd

用MATLAB里的XILINX BLOCKS, 支持FPGA算法, 实现X_NEXT = ((n-1)x+ A/x(n-1)次)/n
Update : 2025-02-19 Size : 28kb Publisher : zhang tian

用MATLAB里的XILINX BLOCKS编写, 做嵌入式用的2个BLOCKS, 一个为除法BLOCK, 另一个为乘方BLOCK.-Using MATLAB in the XILINX BLOCKS prepared to do embedded with the 2 BLOCKS, a division BLOCK, another for the involution BLOCK.
Update : 2025-02-19 Size : 10kb Publisher : zhang tian

用MATLAB 里的XILINX BLOCKS编写, 实现Fibonacci sequence算法, 当F为0时, 输出为0 F为1时, 输出为1 当F为N 时, 输出为F的N-1 加上 F的N-2.-Using MATLAB in the XILINX BLOCKS prepared realize Fibonacci sequence algorithm, when F is 0, the output for 0 F for one, the output is 1 when F is N, the output for the F of the N-1 plus F of N-2 .
Update : 2025-02-19 Size : 25kb Publisher : zhang tian

Xilinx MATLAB、SysGen的 图像 DCT工程-Xilinx MATLAB, SysGen image DCT works
Update : 2025-02-19 Size : 71kb Publisher : xiaowei

DL : 0
这是基于MATLAB下的XILINX的FPGA的FIR滤波器的模型设计文件-This is a MATLAB-based FPGA of the XILINX Model of the FIR filter design documents
Update : 2025-02-19 Size : 262kb Publisher : xueanxi

DL : 0
基于软件无线电的SFF平台,采用Xilinx System Generator实现的数字上变频器-SFF platform based on software radio, using Xilinx System Generator to achieve digital upconverter
Update : 2025-02-19 Size : 52kb Publisher : 刘荣毅

FM demodulator with dsp tools xilinx system generetor for dsp.
Update : 2025-02-19 Size : 19kb Publisher : elhaouari44

基于Xilinx FPGA实现的系数可装载数字滤波器源代码-Configurable Digital Filter Based on FPGA (using Verilog under Matlab 2008a)
Update : 2025-02-19 Size : 2.95mb Publisher : 胡文静

xilinx_ise 11.1 破解,这个版本支持V5的器件,V2一下不支持-Xilinx_ISE_11.1_licgen
Update : 2025-02-19 Size : 516kb Publisher : 高重阳

TRAINING ISE XILINX 11.1-TRAINING ISE XILINX 11.1
Update : 2025-02-19 Size : 22.74mb Publisher : THEZOOZ

TRAININ xilinx ISE 11.1-TRAININ xilinx ISE 11.1
Update : 2025-02-19 Size : 41.09mb Publisher : THEZOOZ

This a Simulink model that demonstrates an algorithm that applies wireless security on physical layer. The demonstration is based on 802.11a (simplified) and receiver is implemented on Xilinx Virtex 4 FPGA. The RAR file inlcudes 2 files: 1. Simulink model 2. initialization file. Software requirements: 1. Matlab, r2007a or later 2. Simulink with DSP and Comm blocksets 3. Xilinx ISE with System Generator for DSP 9.2i or later.
Update : 2025-02-19 Size : 157kb Publisher : 徐滨

Xilinx ISE 11.1 Synthesis Tutorial
Update : 2025-02-19 Size : 2.56mb Publisher : giau

Gps receiver using xilinx fpga and ti dsp in matlab
Update : 2025-02-19 Size : 3.08mb Publisher : liu
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