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[Crack Hack] aes加密算法+演示原码1

Description: 已经通过AES认证的AES的DELPHI实现，比较好，大家自己试试看，搜的-AES has been certified by the AES DELPHI, the better, we all give it a try and found the
Platform: | Size: 34816 | Author: aaa | Hits:

[Crack Hack] SHA-1234567

Description: AES加密算法，最好的加密算法。非常好的。-AES encryption algorithm, the best encryption algorithm. Very good.
Platform: | Size: 189440 | Author: 姜华 | Hits:

[Crack Hack] mini_aes

Description: aes算法的verilog hdl实现，供给大家作为参考 。-Orangk'aes algorithm verilog hdl realized, we supply as a reference.
Platform: | Size: 240640 | Author: 杨忠宇 | Hits:

[Crack Hack] Algorithms

Description: 密码算法AES,DES,IDEA,MD5等的基本理论和硬件加速方案，对算法进行fpga硬件加速的优点等-Cryptographic algorithm AES, DES, IDEA, MD5, etc. The basic theory and hardware acceleration program, the algorithm of the advantages of FPGA hardware acceleration, etc.
Platform: | Size: 1816576 | Author: 胡昊 | Hits:

[Software Engineering] AES

Description: 基于fpga的AES高速实现，介绍了算法实现的过程，仿真结果。-FPGA-based high-speed realization of the AES, introduced the process of algorithm, the simulation results.
Platform: | Size: 1415168 | Author: 王旺 | Hits:

[Crack Hack] RIJNDAEL_DE_TOP

Description: AES解密运算模块，运算速率100Mbps，请大家参考-AES decryption computing module, computing speed 100Mbps, please refer to
Platform: | Size: 19456 | Author: 刘文庆 | Hits:

[Crack Hack] aes

Description: aes加密算法实现，经过FPGA验证的！-aes encryption algorithm, after FPGA validation!
Platform: | Size: 6144 | Author: guochao | Hits:

[Crack Hack] khalil2006_true_random_number_generator

Description: a true random number generator (TRNG) in hardware which is targeted for FPGA-based crypto embedded systems. All crypto protocols require the generation and use of secret values that must be unknown to attackers.Random number generators (RNG) are required to generate public/private key pairs for asymmetric algorithm such as RSA and symmetric algorithm such as AES.
Platform: | Size: 418816 | Author: Hassan Abdelaziz | Hits:

[Crack Hack] AES

Description: AES算法的verilog代码，即AES算法IP核-ip core for AES
Platform: | Size: 13312 | Author: JJ | Hits:

[Software Engineering] platforms

Description: A Pipelined Implementation of AES for Altera FPGA platforms.doc
Platform: | Size: 86016 | Author: Mohammad | Hits:

[VHDL-FPGA-Verilog] aesencryption

Description: Aes encryption on Fpga
Platform: | Size: 4096 | Author: Ibrahim | Hits:

[VHDL-FPGA-Verilog] aes

Description: 高级加密标准AES的FPGA实现，支持128，256密钥长度格式-Advanced Encryption Standard AES, FPGA implementation to support 128,256 key length format
Platform: | Size: 87040 | Author: dinxj | Hits:

[Embeded-SCM Develop] FPGA

Description: 此课件是基于FPGA的加密芯片设计实例，DES的FPGA实现，包括DES加密算法简述，DES的伪代码描述，设计流程，运算电路模型设计，算法程序设计 -The courseware is based on the FPGA chip design example of encryption, DES for FPGA implementation, including the DES encryption algorithm briefly, DES pseudo-code description of the design process, operation circuit modeling, algorithm programming
Platform: | Size: 3852288 | Author: betty | Hits:

[VHDL-FPGA-Verilog] 8_Code

Description: AES algorithm encryption and display on FPGA spartran 2e
Platform: | Size: 30720 | Author: manish | Hits:

[VHDL-FPGA-Verilog] AES_test

Description: verilog AES解密 ACTEL FPGA-verilog AES ACTEL FPGA
Platform: | Size: 112640 | Author: zhongpeng | Hits:

[Crack Hack] AES-implementation-based-on-FPGA

Description: 一种基于FPGA的AES加解密算法设计与实现，对于对AES算法效率的研究有参考作用-FPGA-based AES encryption and decryption algorithm design and implementation of the AES algorithm for the efficiency of a reference
Platform: | Size: 356352 | Author: menshuang | Hits:

[VHDL-FPGA-Verilog] aes

Description: verilog实现的AES-128加解密程序，FPGA验证通过-verilog implementation of AES-128 encryption and decryption process, FPGA verification through
Platform: | Size: 7168 | Author: xie | Hits:

[VHDL-FPGA-Verilog] AES

Description: FPGA Implementation of AES Encryption and Decryption
Platform: | Size: 2064384 | Author: lrx | Hits:

[VHDL-FPGA-Verilog] aes

Description: AES FPGA verilogHDL实现(AES hardware implementation)
Platform: | Size: 36864 | Author: 猪在飞 | Hits:

[VHDL-FPGA-Verilog] aes-project-master

Description: aes project vhdl FPGA
Platform: | Size: 1096704 | Author: Nguyen Nam | Hits:
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