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[MiddleWareleon3-altera-ep2s60-sdr

Description: ahb sdram interface.arm cpu series,include controller
Platform: | Size: 98304 | Author: | Hits:

[Otherahb_system_generator.tar

Description: An AHB system is made of masters slaves and interconnections. A general approach to include all possible "muxed" implementation of multi layered AHB systems and arbitrated AHB ones can be thought as an acyclic graph where every source node is a master, every destination node is a slave and every internal node is an arbiter there must be one and only one arc exiting a master and one or more entering a slave (single slave verus multi-slave or arbitrated slave) an arbiter can have as many input and output connections as needed. A bridge is a special node that collapses one or more slave nodes and a master node in a new "complex" node.
Platform: | Size: 269312 | Author: 木石 | Hits:

[Software EngineeringCorePCIF_AHB_hb

Description: AHB to PCI Structure for FPGA/Asic Designer
Platform: | Size: 525312 | Author: 李晓媛 | Hits:

[VHDL-FPGA-VerilogSLAVERAM

Description: AHB slave 的一个简单的原型程序,通过参考该程序,可以写出相应的ahb slave 代码-AHB slave prototype of a simple procedure, by referring to the program, you can write the corresponding code ahb slave
Platform: | Size: 1024 | Author: goodboy2716 | Hits:

[VHDL-FPGA-VerilogDW_8b10b_enc.v.tar

Description: amba ahb protocol with test benches
Platform: | Size: 3072 | Author: mahesh | Hits:

[Otherahb_interface

Description: AHB BUS, Master Slave Arbiter -- example-AHB BUS, Master Slave Arbiter
Platform: | Size: 540672 | Author: Bill Guan | Hits:

[VHDL-FPGA-Verilogtb_ahb_master

Description: this is a AMBA AHB code for master.
Platform: | Size: 1024 | Author: bhaskar | Hits:

[VHDL-FPGA-VerilogNew

Description: amba ahb master decoder
Platform: | Size: 1024 | Author: bhaskar | Hits:

[VHDL-FPGA-VerilogCODE

Description: AHB总线下的slave ram的verilog代码-AHB bus slave ram verilog
Platform: | Size: 1024 | Author: 龙的传人 | Hits:

[Internet-NetworkAHB_Lite_PO

Description: AHB Lite specification of AMBA protocol
Platform: | Size: 65536 | Author: Anand Krishna | Hits:

[BooksIHI0011A_AMBA_SPEC

Description: AHB Amba specification for SoC Platform
Platform: | Size: 888832 | Author: Anand Krishna | Hits:

[VHDL-FPGA-VerilogCAST_sdr_sdram_ctrl-xact

Description: Single Data Rate Mobile SDRAM Controller Core with AHB Interface
Platform: | Size: 733184 | Author: gosha | Hits:

[VHDL-FPGA-Verilogmasterdecoder

Description: AHB总线协议 Master实现代码,对于开发AHB总线的很有帮助-AHB bus protocol to achieve Master code, very helpful for the development of AHB bus
Platform: | Size: 1024 | Author: 龙的传人 | Hits:

[MiddleWareslaveAHB

Description: 基于ahb协议写的简单salve,水平有限莫怪啊-Ahb-based protocol to write a simple salve, is limited No wonder, then ah
Platform: | Size: 2048 | Author: 将为会 | Hits:

[VHDL-FPGA-Verilogapb2ahb

Description: verilog code for apb to ahb convert
Platform: | Size: 1024 | Author: peng | Hits:

[VHDL-FPGA-Verilogahb_system_generator_latest.tar

Description: this project relates ahb
Platform: | Size: 268288 | Author: david | Hits:

[VHDL-FPGA-VerilogAHB

Description: 用VHDL编写的AMBA总线的AHB代码-Written with the VHDL code for AMBA bus AHB
Platform: | Size: 198656 | Author: guoxiaojin | Hits:

[ARM-PowerPC-ColdFire-MIPSAMBA-AHB-APB-BUS

Description: 常见ARM架构的AMBA、AHB、APB总线的介绍,对ARM的总线有个清晰的了解,对各模块的关系也可深入了解-Common ARM architecture AMBA, AHB, APB bus introduction of ARM' s have a clear understanding of the bus, on the relationship between the modules can also be in-depth understanding of
Platform: | Size: 50176 | Author: sp | Hits:

[VHDL-FPGA-VerilogAHB-BUS-AND-SLAVE-CODE-USING-VERILOG

Description: AHB总线下的slave代码verilog-AHB BUS AND SLAVE CODE USING VERILOG
Platform: | Size: 34816 | Author: xuqinjiang | Hits:

[VHDL-FPGA-VerilogAHB-task-slave-master

Description: ahb master行为级模型,ahb slave模型(AHB master behavior level model, AHB slave model)
Platform: | Size: 2048 | Author: 鱼在在藻 | Hits:
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