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[Other resource] VGA_PLL

Description: alter fpga vga扫描时序源码,来源于红色飓风开发板.-alter fpga vga sequential scanning source code, and from the red hurricane development board.
Platform: | Size: 2776 | Author: xujia | Hits:

[Other Embeded program] VGA_PLL

Description: alter fpga vga扫描时序源码,来源于红色飓风开发板.-alter fpga vga sequential scanning source code, and from the red hurricane development board.
Platform: | Size: 2048 | Author: xujia | Hits:

[Embeded-SCM Develop] EPC2LC20

Description: ALTER的CPLD/FPGA配置芯片的手册，很有用的-ALTER the CPLD/FPGA chip configuration manual, very useful
Platform: | Size: 1639424 | Author: yangyichang | Hits:

[VHDL-FPGA-Verilog] EDA4.3

Description: 一个简单的交通灯程序(包括验证,主程序,和译码程序),在ALTER DE2板上实现-A simple traffic lights (including authentication, the main program, and the decoding process), in the ALTER DE2 board realize
Platform: | Size: 602112 | Author: 朱明 | Hits:

[VHDL-FPGA-Verilog] Lcd-12864

Description: 这是一个用ALTER公司FPGA控制外部128×64液晶的程序，很实用，希望大家下载！-This is a company with FPGA control ALTER external 128 × 64 LCD procedures, it is useful, I hope you download!
Platform: | Size: 2652160 | Author: 裴跃生 | Hits:

[VHDL-FPGA-Verilog] sdramled

Description: alter FPGA，包含sdram的nios系统开发实验完整工程文件-nios develop based nios IDE6.0，system involved an sdram
Platform: | Size: 1414144 | Author: 吴波 | Hits:

[VHDL-FPGA-Verilog] Example-b3-1

Description: ALTER FPGA/GPLD设计（初级篇）的源码，只是其中的一部分供大家参考，如果还有用到其他的，请联系我-ALTER FPGA/GPLD design (primary chapter) of the source, is only one part of it for public consultation, if there are other uses, please contact me
Platform: | Size: 872448 | Author: 宋振丰 | Hits:

[VHDL-FPGA-Verilog] casacade_leds

Description: Alter kit FPGA de2-35 This project shows a cascade motion through board leds.-Alter kit FPGA de2-35 This project shows a cascade motion through board leds.
Platform: | Size: 2519040 | Author: juan pablo | Hits:

[VHDL-FPGA-Verilog] altera_fft

Description: alter官方fft程序 使用verilog编写 需要的同学可以下载-alter the official fft program uses verilog prepared students in need can be downloaded
Platform: | Size: 989184 | Author: 廖国杰 | Hits:

[VHDL-FPGA-Verilog] jtagdownload

Description: alter cpld下载线制作方法集合，自己做就行，不用花40元去买了-alter cpld download cable production method of collection, make their own on the line, do not have to spend 40 yuan to buy a
Platform: | Size: 2455552 | Author: 高兵 | Hits:

[VHDL-FPGA-Verilog] AlterMCU8051IP

Description: 8051IP核 FPGA ALTER公司-8051IP-core FPGA
Platform: | Size: 9214976 | Author: gongcheng | Hits:

[VHDL-FPGA-Verilog] High-Speed-FFT

Description: 优秀硕士论文，课题采用现场可编程门阵列((FPGA)，设计实现了一种超高速FFT处理器。目前，使用FPGA实现FFT多采用基2和基4结构，随着FPGA规模的不断扩大，使采用更高基数实现FFT变换成为可能。本课题就是采用Alter的Stratix II芯片完成了基16-FFT处理器的设计。在设计实现过程中，以基2-FFT搭建基16-FFT的运算核，合理安排时序，解决了碟形运算、数据传输和存储操作协调一致的问题。由于采用流水线工作方式，使整个系统的数据交换和处理速度得以很大提高。本设计实现了4096点和256点的变换，两个内部运算时钟都可以达到1 OOMHz以上，其中256点变换的数据吞吐率高达1.36GHz -a design of ultra high speed FFT processor based onFPGA is developed in this paper. At present we always use radix-2 and radix-4 tocarry out FFT. When the scale of FPGA is panding,it s possible to implement higher radix FFT. This topic uses Stratix II of Altera company to carry out a processor of radix一16 FFT.In this design, radix-16 FFT is carried out by radix-2FFT, The design uses rational time sequence arrangement to make butterflycomputing,data transformation and memory coincide.In order to avoid the bottleneck,pipeline pattern is used,this method acceletates the operating.Thescheme realizes the 4096-points and 256-points FFT, their operation clocks canboth reach above 100MHz. Among them ,the throughput of 256-points FFT is up to1.36GHz.
Platform: | Size: 3759104 | Author: 陈子牙 | Hits:

[VHDL-FPGA-Verilog] music_player

Description: 用 alter FPGA 实现的music音频播放-Music with alter FPGA implementation of audio player
Platform: | Size: 432128 | Author: | Hits:

[VHDL-FPGA-Verilog] I2C

Description: alter fpga,i2c通信程序。现在i2c通信应用越来越广泛，已经深入各个领域。-i2c fpga，
Platform: | Size: 117760 | Author: 梁 | Hits:

[VHDL-FPGA-Verilog] VHDL

Description: 该源码包全面详细的描述了一个基于VHDL的抢答器设计运行于Alter公司的FPGA上-The source package detail an answer based on the VHDL designed to run on Alter FPGA
Platform: | Size: 79872 | Author: liwei | Hits:

[Video Capture] CD1_OV5620_SAVE_UDP_TRANS

Description: OV5620 VHDL CODE, Alter FPGA Source Code.
Platform: | Size: 6245376 | Author: Yongeun | Hits:

[Software Engineering] ALTERA_Quartus_II

Description: 该文档时ALTER FPGA的入门教程，对学校FPGA的童鞋会有一定的帮助。-The document ALTER FPGA introductory tutorial on the FPGA school shoes would certainly help.
Platform: | Size: 2496512 | Author: ww | Hits:

[Other] Altera-FPGA_CPLD

Description: 现场可编程，Fpga资料.alter fpga设计基础-Field Programmable, Fpga information.
Platform: | Size: 22096896 | Author: 张博强 | Hits:

[VHDL-FPGA-Verilog] FPGA(QII)

Description: 数字信号发生器，FPGA做的仿真程序，包含三角波、锯齿波、正弦波、方波等共六种波形。-FPGA AND alter SIN SAN JIAO BO JUCHIBO FANG BO
Platform: | Size: 4196352 | Author: 小华 | Hits:

[Software Engineering] FPGA_MVB

Description: 此论文想详细阐明了用FPGA做硬件处理，集成SOPC功能实现MVB通讯协议的解决方案，可以运行在alter fpga上面。-This paper expounds in detail the processing to do with FPGA hardware, integrated solutions for SOPC function of the realization of MVB communication protocol, can run in alter FPGA above.
Platform: | Size: 6149120 | Author: 王宏科 | Hits:
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