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[Other resource] ref-sdr-sdram-vhdl

Description: DDR控制器的VHDL源代码.采用FPGA实现DDR接口控制器,适用于Altera的FPGA,最高频率可到100M-DDR controller VHDL source code. Using FPGA DDR interface controller, applicable to Altera FPGA, the highest frequency available 100M
Platform: | Size: 776642 | Author: 张涛 | Hits:

[Other resource] sdr sdram controller

Description: ALTERA sdram vhdl与verilog参考设计-Altera SDRAM VHDL and Verilog reference design
Platform: | Size: 2459435 | Author: 陈东平 | Hits:

[Other resource] SDRAM

Description: ALTERA SDR AM Controller White Paper
Platform: | Size: 658903 | Author: 付茗 | Hits:

[Embeded-SCM Develop] altera

Description: FPGA研讨会的一些问题集！-some of the problems set!
Platform: | Size: 398336 | Author: 林建加 | Hits:

[Embeded-SCM Develop] Altera AHDL语言设计的PCI总线Core

Description: Altera AHDL语言设计的PCI总线-AHDL Altera's PCI bus design
Platform: | Size: 94208 | Author: 黄晓东 | Hits:

[VHDL-FPGA-Verilog] ref-sdr-sdram-vhdl

Description: DDR控制器的VHDL源代码.采用FPGA实现DDR接口控制器,适用于Altera的FPGA,最高频率可到100M-DDR controller VHDL source code. Using FPGA DDR interface controller, applicable to Altera FPGA, the highest frequency available 100M
Platform: | Size: 776192 | Author: 张涛 | Hits:

[VHDL-FPGA-Verilog] sdr sdram controller

Description: ALTERA sdram vhdl与verilog参考设计-Altera SDRAM VHDL and Verilog reference design
Platform: | Size: 2458624 | Author: 陈东平 | Hits:

[VHDL-FPGA-Verilog] 发布15个Altera的IP的源码

Description: ALTERA的FPGA的IP核的源代码,为使用ALTERA的FPGA的相关设计提供参考.-Altera FPGA IP core of the source code for the use of Altera FPGA design to provide the relevant information.
Platform: | Size: 49152 | Author: 汪旭 | Hits:

[File Format] ALTERA器件选型手册

Description: ALTERA器件选型手册 对初学者学习FPGA比较有用-Altera device manual for beginners to learn more useful FPGA
Platform: | Size: 706560 | Author: 陈友荣 | Hits:

[MiddleWare] leon3-altera-ep2s60-sdr

Description: ahb sdram interface.arm cpu series,include controller
Platform: | Size: 98304 | Author: | Hits:

[Software Engineering] altera_nios_conductor

Description: altera nios从入门到精通.pdf,对研究NIOS的人员很有帮助-altera nios from entry to the master. pdf, the study of NIOS staff very helpful
Platform: | Size: 2936832 | Author: 磊 | Hits:

[Software Engineering] sdrsdramuse

Description: 一篇讲解ALTERA的FPGA如何实现SDR SRAM的指导文章。很有指导意义。-ALTERA s FPGA on a how to achieve the guidance of SDR SRAM articles. Great guiding significance.
Platform: | Size: 701440 | Author: kurt | Hits:

[VHDL-FPGA-Verilog] H1wQqGvI

Description: 详细介绍了ALTERA器件的IP CORE以及如何使用SDR SDRAM CONTROL-Described in detail ALTERA device IP CORE and how to use SDR SDRAM CONTROL
Platform: | Size: 777216 | Author: 黄辉辉 | Hits:

[ARM-PowerPC-ColdFire-MIPS] SDRAM

Description: ALTERA SDR AM Controller White Paper
Platform: | Size: 658432 | Author: 付茗 | Hits:

[Post-TeleCom sofeware systems] cordic_v1.0.4

Description: Altera公司的CORDIC开发包，用Verilog编写的，安装在Quartus相同目录中，里面有详细的开发说明。-Altera
Platform: | Size: 1355776 | Author: YangJun | Hits:

[VHDL-FPGA-Verilog] ref-sdr-sdram-verilog

Description: 标准SRD SDRAM控制器参考设计，altera提供 Verilog代码,带有使用手册，大家试试交流一下 -Standard SRD SDRAM controller reference design, altera provide Verilog code, with user manual, we try to exchange some
Platform: | Size: 776192 | Author: 费尔德 | Hits:

[VHDL-FPGA-Verilog] altera_sdram

Description: Simple SDRAM controller source code for Altera DE2 board
Platform: | Size: 7168 | Author: leblebitozu | Hits:

[VHDL-FPGA-Verilog] sdr-sdram-(verilog)

Description: Altera的SDR SDRAM模型，verilog实现，带说明书文件以及仿真文件、SDRAM原型文件。-Altera' s SDR SDRAM model, verilog implementation, with manual files and simulation files, SDRAM prototype file.
Platform: | Size: 777216 | Author: 左左 | Hits:

[VHDL-FPGA-Verilog] sdr-sdram-controller-source-code

Description: altera 公司sdr sdram 控制器源码，是VHDL的，大家选择下载-The altera sdr sdram controller source, the VHDL, we choose to download
Platform: | Size: 16384 | Author: 梦殇 | Hits:

[Software Engineering] alter sdr sdram

Description: ALTERA SDR SDRAM controller 说明文档(Altera SDR SDRAM Controller pdf)
Platform: | Size: 702464 | Author: fsc | Hits:
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