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[Books] modelsim使用教程

Description: 一本不错的介绍modemsim的电子书，希望能给大家带来些帮助-a good introductory modemsim of e-books, in hopes of giving us some more help
Platform: | Size: 342016 | Author: 周玲玲 | Hits:

[VHDL-FPGA-Verilog] ModelSim_License

Description: Altera Modesim破解版的LICENCE. 下载解压后: 1.直接运行mentorkg.exe(生成的license.txt拷贝到D:\altera\80\modelsim_ae\下或者mentorkg.exe拷贝到此目录下运行). 2.设置环境变量lm_license_file="D:\altera\80\modelsim_ae\license.txt" 3.搞定-Altera Modesim cracked version of the LICENCE. Decompress after download: 1. Direct running mentorkg.exe (generated copy license.txt to the D: altera80modelsim_ae the next copy of this directory or mentorkg.exe run) .2. Lm_license_file = Set environment variables D: altera80modelsim_aelicense.txt 3. get
Platform: | Size: 313344 | Author: xingyu | Hits:

[Other] Altera_timing

Description: 关于altera公司产品的一些常见时序特征及问题（英文版电子书PDF格式）-Altera company s products on some common characteristics and timing issues (in English e-book PDF format)
Platform: | Size: 1533952 | Author: peter | Hits:

[VHDL-FPGA-Verilog] DE2_USB_API

Description: 这是ALTERA 公司的DE2开发板上的关于USB API开发的例子-This is ALTERA' s DE2 Development Board regarding the USB API to develop examples of
Platform: | Size: 1380352 | Author: 翁文天 | Hits:

[Delphi VCL] Extend

Description: Rotinas uteis para strings e altera a caixa de dialogo de mansagens, delphi 2.. 7
Platform: | Size: 69632 | Author: jaques | Hits:

[VHDL-FPGA-Verilog] DE2usingbook

Description: ED2中文手册，是哥们买板子时送配的，altera原版，是非常好的器件查询资料-ED2 Chinese Manual, Transmission and Distribution is a buddy bought the board when the, altera original, is a very good device for data access
Platform: | Size: 5673984 | Author: bobo | Hits:

[VHDL-FPGA-Verilog] testbench

Description: altera 最新的CYCLONE IV的pci-e核的testbench，VHDL源程序。-altera latest CYCLONE IV of the pci-e core testbench, VHDL source code.
Platform: | Size: 1759232 | Author: greenpine | Hits:

[VHDL-FPGA-Verilog] MYCRC

Description: 由于altera公司的CRC生成和校验模块不支持本系统使用的Cyclone IV E系列FPGA，因此本文独立设计了CRC模块。该模块的接口与altera公司的CRC模块接口基本一致，能够对16位输入的数据流进行CRC校验码生成和校验。本文采用CRC-CCITT生成项，其表达式为：X16+X12+X5+X0。本模块需要startp信号及endp信号指示数据传输的起始及结束。本模块采用状态机设计，对于数据头和数据尾分别由不同的状态来处理。在本模块中，使用了for循环，这会消耗较多的FPGA资源，但暂时任未发现其他改进的方法。-Because altera company' s CRC generation and checking modules do not support the use of the system Cyclone IV E series FPGA, so this independent design of the CRC module. The module' s interface with the CRC module interface altera' s basically the same, capable of 16-bit input data stream of CRC generation and checking. In this paper, CRC-CCITT generation entry, its expression is: X16+ X12+ X5+ X0. This module requires startp signal and endp signal indicating the start and end of data transmission. This module is a state machine design, and data for the end of the first data were handled by different states. In this module, use the for loop, which consumes more FPGA resources, but temporarily did not find any other ways to improve.
Platform: | Size: 4096 | Author: 陈建 | Hits:

[VHDL-FPGA-Verilog] c4gx_PCIe_gen1_x1

Description: 基于altera公司的cyclone4的pci-e源代码，非常好用，已经量产。-The altera Company a cyclone4 the pci-e source code, very easy to use, already in mass production.
Platform: | Size: 4494336 | Author: yang jinlin | Hits:

[Software Engineering] SHA-1ImplementationOnFPGA

Description: 希算法SHA-1算法广泛地应用于电子商务、商用加密软件等信息安全领域。通过对SHA．1算法的深入 分析，提出了流水线结构的硬件实现方案。通过缩短关键路径，使用片内RAM代替LE寄存器实现流水线中间变量 的数据传递，有效地提高了工作频率和单位SHA-1算法的计算速度。这种硬件结构在Altera系列芯片上的实现性能 是Ahera商用SHA-1算法IP核的3倍以上。-Hash algorithm SHA-1 is used widely in cryptographic applications such as E-commerce and commercial en— cryption softwares．By making an overall analysis．implementation of pipeline structure was proposed,By shorting the eritical path，using inside RAMs to realize the daha translation instead of LE，we improved the frequency and the speed of per SHA-1 uIlit．The performance on FPGAs of Altera iS three times faster of commercial IP cores for SHA—1． Keywords Hash algorithm(SHA?1)，Critical path，Pipeline structure，Throughput of per AT production unit(TP— PAT)。CsA
Platform: | Size: 279552 | Author: 徐晓刚 | Hits:

[VHDL-FPGA-Verilog] PEX8311_test

Description: PEX 8311 OK PCI e cycloneIII altera quartus FPGA CPLD
Platform: | Size: 1139712 | Author: 寒雪亮 | Hits:

[Other] FPGA_learning_books

Description: learn and master Field programmable gate arrays (FPGAs). hand-book for starters 2 of the biggest FPGA companies i.e Altera & Xilinx- learn and master Field programmable gate arrays (FPGAs). hand-book for starters 2 of the biggest FPGA companies i.e Altera & Xilinx
Platform: | Size: 19569664 | Author: umair | Hits:

[Software Engineering] Altera-FPGA-Testing-v1

Description: This document describes functionality testing of the Altera Cyclone III FPGA Starter Kit Development Board. It also includes testing of associated daughterboards, i.e. the ADA ADC/DAC board and the HSMC to GPIO adapter board.
Platform: | Size: 1209344 | Author: mchi2ph2 | Hits:

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