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[Other resource] I2C总线控制器 altera提供-VHDL DL : 0: I2C总线控制器 altera提供的VHDL的源程序代码-I2C Bus Controller ALTERA the VHDL source code
Update : 2008-10-13 Size : 1.56mb Publisher : 陈旭
[Other resource] mi2c DL : 0: altera i2c host/device-ALTERA i2c host / device
Update : 2008-10-13 Size : 1.47mb Publisher : 馬旧
[Other resource] i2c_p_altera DL : 0: altera i2c slave ip核verilog 编写
Update : 2008-10-13 Size : 1.51mb Publisher : 1984taozi
[VHDL-FPGA-Verilog] I2C总线控制器 altera提供-VHDL DL : 0: I2C总线控制器 altera提供的VHDL的源程序代码-I2C Bus Controller ALTERA the VHDL source code
Update : 2025-02-17 Size : 1.56mb Publisher : 陈旭
[VHDL-FPGA-Verilog] mi2c DL : 0: altera i2c host/device-ALTERA i2c host/device
Update : 2025-02-17 Size : 1.47mb Publisher : 馬旧
[Driver Develop] 20070412011I2C DL : 0: 由altera提供的原码，实现I2C控制的源代码程序-altera provided by the original code, I2C control of the source code procedures!
Update : 2025-02-17 Size : 2.11mb Publisher : 董清清
[Embeded-SCM Develop] I2C_Controller DL : 0: I2C controller verilog code for altera fpga platform.
Update : 2025-02-17 Size : 1kb Publisher : 蔡俊仪
[Embeded-SCM Develop] i2c_IP DL : 0: altera 的i2c ip核，可直接调用在quartus中把库指向文件位置就可-altera the i2c ip nuclear, can be directly called in the Quartus point in the database file location can be
Update : 2025-02-17 Size : 7kb Publisher : 李涛
[VHDL-FPGA-Verilog] i2c_altera DL : 0: I2C总线控制器 altera公司提供VHDL实现代码-I2C bus controller altera companies realize VHDL code
Update : 2025-02-17 Size : 1.52mb Publisher : 张庆顺
[VHDL-FPGA-Verilog] i2c_p_altera DL : 0: altera i2c slave ip核verilog 编写-altera i2c slave ip to prepare nuclear Verilog
Update : 2025-02-17 Size : 1.51mb Publisher : 1984taozi
[Embeded-SCM Develop] I2C DL : 0: i2c ipcore of altera fpga that uses ahdl lauguage.
Update : 2025-02-17 Size : 7kb Publisher : linjack
[VHDL-FPGA-Verilog] src DL : 0: i2c module. i test it on Altera FPGA.
Update : 2025-02-17 Size : 3kb Publisher : almondeo
[VHDL-FPGA-Verilog] nios DL : 0: altera ep2c8V2 开发实例 timer uart I2C key interrupt 等-altera ep2c8V2 examples timer uart I2C key interrupt etc.
Update : 2025-02-17 Size : 11.22mb Publisher : chris
[VHDL-FPGA-Verilog] I2C DL : 0: I2C主机端模块具有avalon-MT总线接口可挂载在Altera soc系统之上使NiosII处理器具备I2C通信能力模块由Verilog HDL编写并经Cyclone II FPGA测试-I2C master modul which has a avalon-MT interface that can be attached to Altera SOC system. It provides NiosII I2C communication capability . This module is written with Verilog HDL and has been tested on a Cyclone II FPGA
Update : 2025-02-17 Size : 6kb Publisher : magic_andy
[VHDL-FPGA-Verilog] I2C DL : 0: i2c总线的工程实现，可以用在altera环境下验证-i2c bus project implementation can be used in altera verification environment
Update : 2025-02-17 Size : 74kb Publisher : 韩向超
[VHDL-FPGA-Verilog] I2C DL : 0: I2C/IIC 总线接口驱动，在Altera和Xilinx的FPGA上跑过，Verilog编写，Craftor原创。V1.1。代码中还包含了24C02的读写测试程序，可直接用。-I2C/IIC Bus Driver, written in Verilog, v1.1. By Craftor
Update : 2025-02-17 Size : 2kb Publisher : Craftor
[VHDL-FPGA-Verilog] I2C DL : 0: 本源代码中用Verilog HDL语言编写了I2C的顶层及子模块文件，详细完整，并在Altera实验板上得以验证-primitive code discribe the I2C s function using the Verilog HDL language, the code are particular and integrity,moreover it has been validated in the altera FPGA and passed
Update : 2025-02-17 Size : 18kb Publisher : 蔡德胜
[VHDL-FPGA-Verilog] i2c DL : 0: 基于ALTERA EP2C8Q208 FPGA的通过i2c通信读写24c01的VHDL程序-A VHDL program,based on EP2C8Q208,using i2c read and write data to 24c01
Update : 2025-02-17 Size : 249kb Publisher : 曹锋
[VHDL-FPGA-Verilog] Altera-verilog-I2C DL : 0: I2c verilog语言，在开发板上验证过的FPGA端代码程序；(Altera flatform, use verilog code i2c, test ok.)
Update : 2025-02-17 Size : 985kb Publisher : 武哥
[VHDL-FPGA-Verilog] i2c DL : 0: 这是基于altera avalon-MM总线的I2C IP核。利用VHDL语言编写。(This is an I2C IP core based on the altera avalon-MM bus. Using VHDL language.)
Update : 2025-02-17 Size : 81kb Publisher : 打采萨

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