Search - altera uart

[Embeded-SCM Develop] UART

Description: Altera公司开发板1c20 CF卡通用例程（初始化、读、写、测试等）-Altera Corporation development board 1c20 CF cartoon with routines (initialization, reading, writing, testing, etc.)
Platform: | Size: 6514 | Author: yl | Hits:

[Linux-Unix] isr_uart_example_code

Description: altera串口源代码程序-ALTERA source code procedures
Platform: | Size: 5120 | Author: 梁远 | Hits:

[VHDL-FPGA-Verilog] sopc

Description: altera推出的基于它们fpga和cpld的构建嵌入式系统的新技术sopc的介绍。其集成在quartus II中-ALTERA due to launch them and they simply cpld Construction of the new Embedded System Technology sopc briefing. Its integrated into the Quartus II
Platform: | Size: 8863744 | Author: 刘吉 | Hits:

[VHDL-FPGA-Verilog] Altera_uart_VHDL

Description: FPGA/CPLD应用,uart通讯VHDL原码.-FPGA/CPLD applications, UART communications VHDL source.
Platform: | Size: 10240 | Author: cyberworm | Hits:

[Embeded-SCM Develop] UART

Description: Altera公司开发板1c20 CF卡通用例程（初始化、读、写、测试等）-Altera Corporation development board 1c20 CF cartoon with routines (initialization, reading, writing, testing, etc.) -Altera Corporation development board 1c20 CF Card routines (initialization, read, write, test, etc.)-Altera Corporation development board 1c20 CF cartoon with routines (initialization, reading, writing, testing, etc.)
Platform: | Size: 6144 | Author: yl | Hits:

[Other] uart_IP

Description: altera 的uart ip核，可直接调用在quartus中把库指向文件位置就可-altera the uart ip nuclear, can be directly called in the Quartus point in the database file location can be
Platform: | Size: 5120 | Author: 李涛 | Hits:

[VHDL-FPGA-Verilog] 16550

Description: UART16550兼容的串行通讯控制器，Verilog语言描述，采用Altera Cyclone系列芯片实现FPGA综合，因为FIFO部分利用到内部资源实现。已经在某项目中成功应用，特此推出。-UART16550 compatible serial communication controller, Verilog language description, the use of Altera Cyclone series FPGA chip integrated, as part of the use of FIFO to the internal resources to achieve. Projects have been in a successful application, is hereby introduced.
Platform: | Size: 10240 | Author: David.Mr.Liu | Hits:

[VHDL-FPGA-Verilog] miniUART

Description: 自适应波特率的通用异步串行接口电路（ＵＡＲＴ）的ＶＨＤＬ源码，在ＡＬＴＥＲＡ上运行成功-Adaptive baud rate of the universal asynchronous serial interface circuit (UART) the VHDL source code, to run successfully in ALTERA
Platform: | Size: 9216 | Author: 甘甜 | Hits:

[Software Engineering] 15Altera_IP

Description: 里面包含15个altera的IP核的源代码,包括I2C，UART，VGA_SYN-Which contains 15 nuclear altera the IP source code, including I2C, UART, VGA_SYN
Platform: | Size: 49152 | Author: hhl | Hits:

[Other] ds_nios_uart

Description: altera nios uart en文档，官方的最底层的驱动开发-altera nios uart
Platform: | Size: 196608 | Author: sunlichao | Hits:

[VHDL-FPGA-Verilog] uart

Description: uart的vhdl实现，包含完整quartus工程文件，相信会有较大帮助-uart vhdl quartus
Platform: | Size: 212992 | Author: Carlin | Hits:

[VHDL-FPGA-Verilog] UART_DMA

Description: 基于ALTERA公司的NIOSII的串口通信DMA传输设计-NIOSII based on ALTERA s DMA transfer of the serial communication design
Platform: | Size: 11346944 | Author: 王超 | Hits:

[VHDL-FPGA-Verilog] nios

Description: altera ep2c8V2 开发实例 timer uart I2C key interrupt 等-altera ep2c8V2 examples timer uart I2C key interrupt etc.
Platform: | Size: 11765760 | Author: chris | Hits:

[VHDL-FPGA-Verilog] uart16450

Description: uart 16450合集,xilin altera lattice-collection of uart controller 16450
Platform: | Size: 822272 | Author: jhv | Hits:

[VHDL-FPGA-Verilog] URAT_VHDL_CODE

Description: altera公司的fpga源代码，用VHDL编写的uart程序。-altera' s fpga source code, uart program written using VHDL.
Platform: | Size: 32768 | Author: 张东 | Hits:

[VHDL-FPGA-Verilog] SOPC_UART

Description: altera公司的ep1c240c8n，串口调试程序vhdl\nios ii8.0代码等-altera company ep1c240c8n, serial debugger vhdl \ nios ii8.0 code. .
Platform: | Size: 3193856 | Author: 张东 | Hits:

[Embeded-SCM Develop] altera_avalon_uart

Description: Altera NIOS II uart 驱动-uart driver in NIOS II
Platform: | Size: 22528 | Author: zy | Hits:

[VHDL-FPGA-Verilog] altera-uart

Description: ALTERA UART sopc 软核的VHDL描述-ALTERA UART VHDL DESCRIBE
Platform: | Size: 9216 | Author: pengli | Hits:

[VHDL-FPGA-Verilog] UART-HPY

Description: 利用FPGA实现了UART编解码功能，已在Xilinx及Altera多种型号FPGA例化使用。附有寄存器使用说明。(a useful UART decoder and encoder.)
Platform: | Size: 48128 | Author: 帕萨迪纳 | Hits:

[VHDL-FPGA-Verilog] uart

Description: 嵌入式串口通讯，采用verilog编写，在altera开发板上运行(Embedded serial communication, written using Verilog, altera development board on the run)
Platform: | Size: 2843648 | Author: 歪歪mao | Hits:

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[Embeded-SCM Develop] UART

[Linux-Unix] isr_uart_example_code

[VHDL-FPGA-Verilog] sopc

[VHDL-FPGA-Verilog] Altera_uart_VHDL

[Embeded-SCM Develop] UART

[Other] uart_IP

[VHDL-FPGA-Verilog] 16550

[VHDL-FPGA-Verilog] miniUART

[Software Engineering] 15Altera_IP

[Other] ds_nios_uart

[VHDL-FPGA-Verilog] uart

[VHDL-FPGA-Verilog] UART_DMA

[VHDL-FPGA-Verilog] nios

[VHDL-FPGA-Verilog] uart16450

[VHDL-FPGA-Verilog] URAT_VHDL_CODE

[VHDL-FPGA-Verilog] SOPC_UART

[Embeded-SCM Develop] altera_avalon_uart

[VHDL-FPGA-Verilog] altera-uart

[VHDL-FPGA-Verilog] UART-HPY

[VHDL-FPGA-Verilog] uart

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