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[VHDL-FPGA-Verilog] altera_up_avalon_sram

Description: 基于Avalon的SDRAM控制器IP核-Avalon SRAM Controller
Platform: | Size: 320512 | Author: 涂登乾 | Hits:

[VHDL-FPGA-Verilog] SRAM_Controller

Description: Altera University Program的Avalon总线IP核，SRAM控制代码，可以解压后直接挂载在Avalon总线上 -Altera University Program of the Avalon bus IP core, SRAM control code can be directly mounted after decompression in the Avalon bus
Platform: | Size: 324608 | Author: vicky | Hits:

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