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Description: 该文阐述了现场可编程逻辑器件FPGA的主要特点,应用FPGA芯片和VHDL硬件描述语言设计的模拟示波器数字信号显示系统的设计原理和设计方法。-this paper, the field programmable logic devices FPGA main feature FPGA chip and VHDL hardware description language design analog signals to digital oscilloscope system design principles Design and Methods.
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Size: 439296 |
Author: 张志华 |
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Description: 驱动模数转换器ADC0809转换的VHDL代码-Driver Analog to Digital Conversion Connection between ADC 0809 VHDL code
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Size: 108544 |
Author: YI |
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Description: This example streams input from a ADC source to a DAC.
An analog signal is acquired block-by-block into SDRAM from the ADC (an AD9244 in this example).
The frames are then output with a one-frame delay to the DAC (an AD9744 in this example).
In this example, no processing is done on the frames. They are passed unaltered.
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Size: 23552 |
Author: gaofeng |
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Description: Analog-to-Digital Converter,VHDL code-Analog-to-Digital Converter, VHDL code
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Size: 14336 |
Author: leigh lee |
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Description: I2C在CPLD上的模拟实现源程序,I2C在CPLD上的模拟实现源程序-I2C in CPLD realize the analog source, I2C in CPLD realize the analog source
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Size: 1024 |
Author: zhp |
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Description: 实现8通道模拟/数字转换和数字/模拟转换的例子,采用ISA总线控制逻辑.-Realize 8-channel analog/digital conversion and digital/analog converter example, the use of ISA bus control logic.
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Size: 3072 |
Author: 兰升 |
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Description: 接受里程传感器的脉冲输入(在本方案中使用PWM模拟替代传感器脉冲),并对脉冲进行计量,继而转换成里程;
采用现行出租车计价系统的计算方法,对行驶里程进行计费;
提供友好的用户界面,并具有语音提示功
能。
基于凌阳单片机!-Accept the mileage sensor pulse input (in this program using alternative sensors analog PWM pulse), and pulse measuring, and then converted into mileage
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Size: 560128 |
Author: 冯旭升 |
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Description: 在cyclone2芯片上实现VGA解决方案,可以将模拟示波器波形在电脑上显示。也可以储存波形文件来显示
-In cyclone2 chip VGA solutions, Analog Oscilloscope waveforms can be displayed on the computer. Can also be stored waveform file to display
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Size: 2048 |
Author: 王忠 |
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Description: 这是一个有关实时模拟和数字图像处理的fpga程序-This is a real-time analog and digital image processing procedures for the FPGA
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Size: 1024 |
Author: cjgqf |
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Description: 介绍高速存储示波器实现方案,DSO有许多模拟示波器没有的控制机构。-Introduced the program to achieve high-speed storage oscilloscope, DSO Analog Oscilloscope many institutions do not control.
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Size: 401408 |
Author: 叶飞 |
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Description:
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Size: 329728 |
Author: 糖欣 |
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Description: Design of Integrated Circuits for Optical Communications deals with the design of high-speed integrated circuits for optical communication systems. Written for both students and practicing engineers, the book systematically takes the reader from basic concepts to advanced topics, establishing both rigor and intuition. The text emphasizes analysis and design in modern VLSI technologies, particularly CMOS, and presents numerous broadband circuit techniques. Leading researcher Behzad Razavi is also the author of Design of Analog CMOS Integrated Circuits.
-Design of Integrated Circuits for Optical Communications deals with the design of high-speed integrated circuits for optical communication systems. Written for both students and practicing engineers, the book systematically takes the reader from basic concepts to advanced topics, establishing both rigor and intuition. The text emphasizes analysis and design in modern VLSI technologies, particularly CMOS, and presents numerous broadband circuit techniques. Leading researcher Behzad Razavi is also the author of Design of Analog CMOS Integrated Circuits.
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Size: 10731520 |
Author: huang |
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Description: vhdl实现对模数转换芯片adc0832的控制,程序采用的是状态编码输出.-VHDL realization of analog-digital conversion chip adc0832 control, procedures using state of the output encoding.
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Size: 24576 |
Author: liaocongliang |
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Description: 数字锁相环(DPLL)技术在数字通信、无线电电子学等众多领域得到了极为广泛的应用。与传统的模拟电路实现的PLL相比,DPLL具有精度高、不受温度和电压影响、环路带宽和中心频率编程可调、易于构建高阶锁相环等优点。-Digital phase-locked loop (DPLL) technology in digital communications, radio electronics, and many other fields has been extremely wide range of applications. With the traditional analog circuit implementation of the PLL in comparison, DPLL with high accuracy, free from the impact of temperature and voltage, loop bandwidth and center frequency adjustable programming, easy to build a high-order phase-locked loop, etc..
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Size: 1024 |
Author: hellen |
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Description: 本设计采用AT89552单片机,辅以必要的模拟电路,实现了一个基于直接数字频率合成技术(DDS)的正弦谊号发生器。设计中采用DDS芯片AD9850产生频率1KHZ~10MHZ范围内正弦波,采用功放AD811控制输出电压幅度, 由单片机AT89S52控制调节步进频率1HZ。在此基础上,用模拟乘法器MC1496实现了正弦调制信号频率为1KHZ的模拟相度调制信号;用FPGA芯片产生二进制NRZ码,与AD9850结合实现相移键控PSK、幅移键控ASK、频移镇键FSK。-AT89552 the single-chip design, supplemented by the necessary analog circuits, based on the realization of a direct digital frequency synthesis (DDS) generator of sinusoidal No. Friends. The design of DDS chip AD9850 produced using 1KHZ ~ 10MHZ frequency range of sine wave, the AD811 control amplifier output voltage range of from single-chip AT89S52-conditioning step frequency control 1HZ. On this basis, the use of analog multiplier MC1496 has sinusoidal frequency modulation signal 1KHZ degree analog phase modulated signal generated by FPGA chip NRZ binary code, combined with the AD9850 to achieve phase shift keying PSK, ASK ASK, frequency Shift key town of FSK.
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Size: 208896 |
Author: 何蓓 |
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Description: 信号与线性系统的时频域分析:观测已知方波信号、正弦波信号的频谱;观测实时模拟信号的频谱;加深理解时域周期信号的各频率分量在振幅频谱图上所占的比重;观测相位在波形合成中的作用;LTI系统的频域分析,LTI系统对周期性输入信号的响应。-Signals and linear systems with time-frequency domain analysis: observation known square wave signal, sine wave signal spectrum observation of the spectrum in real-time analog signal a deeper understanding of time-domain periodic signal component in the amplitude of each frequency spectrum chart the proportion of observation phase in the waveform synthesis LTI system frequency domain analysis, LTI system response to periodic input signals.
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Size: 7168 |
Author: 无语 |
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Description: Analog filter in Vhdl for fpgas
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Size: 112640 |
Author: NightFox |
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Description: 时钟同步模块:通过时钟同步模块,将模拟前端提取的时钟信号和数据进行同步,使得数字后端可以正确读取数据。-Clock synchronization module: The clock synchronization module, the analog front-end of the clock signal extraction and data synchronization, making the number of back-end data can be read correctly.
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Size: 1024 |
Author: Jim Chen |
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Description: 用VHDL编写一个字长16位,容量128B的RAM控制实现程序,并进行设计综合和功能模拟 。含源程序,及实验要求。适合初学者学习使用。-VHDL prepared with a 16-bit word length, 128B of the RAM capacity to achieve process control and design of analog integrated and functional. Containing source code, and experimental requirements. Suitable for beginners learning to use.
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Size: 9216 |
Author: 赵剑平 |
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Description: Digital to Analog Converter code VHDL
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Size: 3072 |
Author: gfngk |
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