Welcome！[Sign In] ！[Sign Up]！
Front-page it | Collect it | [中国-简体中文]
FAQ Fav
Location:
Search - arinc 429 verilog

Search list

[Embeded-SCM Develop] 429_enc_dec

Description: Quartus开发环境下开发的Arinc 429总线收发器工程，由于产权问题，提供的程序有删减，标号未尽规范。-Quartus development environment developed under the Arinc 429 bus transceiver works, because the issue of property rights, provided procedures are deleted, not standardized labeling.
Platform: | Size: 679936 | Author: wangyunshann | Hits:

[Other] arinc429_receiver

Description: Simple Arinc-429 receiver channel description on Verilog HDL with parameterized DATA and LABEL FIFOs.
Platform: | Size: 6144 | Author: scnn86 | Hits:

[VHDL-FPGA-Verilog] arinc429_transmitter

Description: Simple Arinc-429 transmitter channel description on Verilog HDL with parameterized DATA FIFO.
Platform: | Size: 4096 | Author: scnn86 | Hits:

[Other] hi3585

Description: verilog code for hi3585 SPI control code .HI3585 is a arinc 429 bus protocol.
Platform: | Size: 6144 | Author: TBlue | Hits:

CodeBus www.codebus.net