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[WEB Code] studyonhighspeedandrealtimestorage

Description: 以“宽幅盖面阵立体测绘小相机”项目为课题背景,深入的研究了高速图像传输,图 像实时压缩和压缩图像数据的实时存储问题 ATA,fpga-"Wide Coverage RUF small, three-dimensional mapping camera," project subject to the background and in-depth study of the high-speed image transmission, Image compression and real-time compression of real-time image data storage problems ATA, fpga
Platform: | Size: 5781767 | Author: wangzi | Hits:

[Driver Develop] ata_ip

Description: ATA接口的IP核,经过量产的验证,已经在quartus5.1下编译通过了.-ATA interface IP core, after volume production test in quartus5.1 compiler passed.
Platform: | Size: 510976 | Author: 李想 | Hits:

[Documents] studyonhighspeedandrealtimestorage

Description: 以“宽幅盖面阵立体测绘小相机”项目为课题背景,深入的研究了高速图像传输,图 像实时压缩和压缩图像数据的实时存储问题 ATA,fpga-"Wide Coverage RUF small, three-dimensional mapping camera," project subject to the background and in-depth study of the high-speed image transmission, Image compression and real-time compression of real-time image data storage problems ATA, fpga
Platform: | Size: 5781504 | Author: wangzi | Hits:

[VHDL-FPGA-Verilog] xst3_IDE

Description: Access IDE harddisk by Xilinx FPGA Support PIO2-err
Platform: | Size: 33792 | Author: ronsullivan | Hits:

[VHDL-FPGA-Verilog] ata.tar

Description: 使用verilog和VHDL两种硬件描述语言实现了一个ATA硬盘控制器，包括源代码、测试仿真文件和说明文档-The use of two types of Verilog and VHDL hardware description language to achieve an ATA hard drive controller, including source code, testing, simulation files and documentation
Platform: | Size: 835584 | Author: qinlei | Hits:

[VHDL-FPGA-Verilog] Chapter6-9

Description: 第六章到第九章的代码 本书通过100多个模块实例，详细地讲解了Verilog HDL程序设计语言，全书共分13章，内容涉及VerilogHDL语言基本概念、建模、同步设计、异步设计、功能验证等，实例包括各种加法器/计数器、乘法器/除法器、编码器/译码器、状态机、SPIMaster Controller、I2C Master controller、CAN ProtocolController、Memory模块、JPEG图像压缩模块、加密模块、ATA控制器、8位RISC-CPU等及各个实例模块相应的Testbench，所举实例具有很强的实用性和代表性，每个实例均给出了介绍、功能分析、程序代码和结果演示。-Chapter VI to Chapter IX of the code in this book through more than 100 module instance, explain in detail the Verilog HDL programming language, the book is divided into 13 chapters, covering basic concepts VerilogHDL languages, modeling, synchronous design, asynchronous design, functional verification, etc. Examples include a variety of adder/counter, multiplier/divider, encoders/decoders, state machines, SPIMaster Controller, I2C Master controller, CAN ProtocolController, Memory modules, JPEG image compression module, encryption module, ATA controller, 8-bit RISC-CPU, etc. and the various instances of the corresponding module Testbench, The examples are highly practical and representation, each instance of it all gives the introduction, functional analysis, program code and results presentation.
Platform: | Size: 6281216 | Author: xiao | Hits:

[VHDL-FPGA-Verilog] SATA-Connectivity-solutions-for-Xilinx-FPGAs.pdf.

Description: This gives an overview over the Serial ATA (SATA) protocol and the implications when integrating SATA into an FPGA-based programmable system. Besides details of the different protocol layers, we will discuss the hardware and software components for building a complete, reliable, high-performance SATA solution by utilizing a design platform from Missing Link Electronics (MLE).
Platform: | Size: 390144 | Author: mancity | Hits:

[VHDL-FPGA-Verilog] 8b10_enc

Description: 8B10B是应用最广泛的编码技术。它被用于串行连 接SCSI、串行ATA、光纤链路、吉比特以太网、XAUI（10吉比特接口）、PCIExpress总线、InfiniBand、 SeriaRapidIO、HyperTransport总线以及IEEE1394b接口（火线）技术中。-8b/10b has been widely adopted by a variety of high speed data communication standards used today and should prove ever more useful for FPGA-based designs as clock speeds and I/O capabilities increase. 8b/10b has been widely adopted by a variety of high speed data communication standards used today and should prove ever more useful for FPGA-based designs as clock speeds and I/O capabilities increase.
Platform: | Size: 3072 | Author: gg | Hits:

[VHDL-FPGA-Verilog] big_data_encoder

Description: 本文介绍了一个以FPGA为主控制器的多存储芯片数据采集板卡的设计。该卡通过一个符合ATA-6规范的IDE接口,使用PIO模式将数据采集板卡与上位机互联。通过FPGA控制一片高速AD进行数据采集,采集的数据通过4片电子盘并行存储,实现高速大容量数据采集。文章侧重于介绍用FPGA控制电子盘并行读写的方法-This paper introduces an FPGA-based controller design multi memory chip data acquisition board. The card through a line with ATA-6 standard IDE interface, using PIO mode data acquisition board and PC connectivity. FPGA control through a high-speed AD data acquisition, data collected through four parallel electronic disk storage, high-speed large-capacity data acquisition. Article focuses on the introduction of electronic trading methods to read and write in parallel with the FPGA control
Platform: | Size: 5765120 | Author: lvhenan | Hits:

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