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[Other resourceShifters_vhdl

Description: -- Title : Barrel Shifter (Pure combinational) -- This VHDL design file is an open design you can redistribute it and/or -- modify it and/or implement it after contacting the author -- You can check the draft license at --- Title : Barrel Shifter (Pure combinational) -- This VH DL design file is an open design you can redistri bute it and / or -- modify it and / or implement it a fter contacting the author -- You can check the d raft license at
Platform: | Size: 2025 | Author: 陈朋 | Hits:

[VHDL-FPGA-VerilogShifters_vhdl

Description: -- Title : Barrel Shifter (Pure combinational) -- This VHDL design file is an open design you can redistribute it and/or -- modify it and/or implement it after contacting the author -- You can check the draft license at --- Title : Barrel Shifter (Pure combinational)-- This VH DL design file is an open design you can redistri bute it and/or-- modify it and/or implement it a fter contacting the author-- You can check the d raft license at
Platform: | Size: 2048 | Author: 陈朋 | Hits:

[VHDL-FPGA-Verilogbarrel_shifter

Description: VHDL实现的桶型移位器,能在一个时钟周期实现对数据的(0-12位)算术右移-VHDL implementation of a barrel—shifter, able to achieve at one clock cycle of data (0-12 bit) Arithmetic Shift Right
Platform: | Size: 1024 | Author: 过时无双 | Hits:

[Othersrc

Description:
Platform: | Size: 1024 | Author: Cuong Tran | Hits:

[Othertms320vc5416

Description: TMS320VC5416的主要特征有: (1)优化的CPU结构:增强的多总线结构,数据总线具有总线保持特性;40bit的算术逻辑单元(ALU),包括两个独立的40bit的累加器,一个40bit的桶形移位器;一个17×17的乘法器连接一个40bit专用加法器,可用来进行非流水线式的单周期乘/累加(MAC)操作等。 -The main features of the TMS320VC5416 are: (1) to optimize the structure of the CPU: Enhanced multi-bus architecture, data bus has a bus to maintain properties 40bit arithmetic logic unit (ALU), including the two independent 40bit accumulator, a Barrel shifter of 40bit a multiplier of 17 × 17 to connect a dedicated 40bit adder that can be used to carry out non-pipelined single-cycle by/accumulate (MAC) operation.
Platform: | Size: 703488 | Author: wshh | Hits:

[VHDL-FPGA-Verilogbshift

Description: Barrel shifter VHDL code for Matlab
Platform: | Size: 2048 | Author: Abhi | Hits:

[VHDL-FPGA-VerilogBarrel_shifter

Description: verilog语言的桶形移位器,实验课上做的,大家别见笑-Barrel shifter
Platform: | Size: 3631104 | Author: zhangrongfei | Hits:

[VHDL-FPGA-VerilogMove071221133_32

Description: 用Verilog HDL语言或VHDL语言来编写,实现32位的桶形移位器。 并在Quartus Ⅱ上实现模拟仿真;-With the Verilog HDL language or VHDL language to write to achieve 32-bit barrel shifter. To achieve in the Quartus Ⅱ simulation
Platform: | Size: 818176 | Author: 于伟 | Hits:

[Embeded-SCM DevelopbarrierShifter32bit071221136

Description: 用VHDL语言所书写的32位桶形移位器,在QuartusII中编译通过-Written in VHDL language using 32-bit barrel shifter, compiled by the QuartusII
Platform: | Size: 1800192 | Author: zdd | Hits:

[VHDL-FPGA-Verilogshifter32

Description: 32位桶形移位器,verilog语言书写-barrel shifter
Platform: | Size: 2160640 | Author: 刘君 | Hits:

[VHDL-FPGA-Verilogmove

Description: 桶形移位器,运用Verilog语言,编程实现,仿真正确,顺利执行。-Barrel shifter, the use of Verilog language, programming, simulation is correct, the successful implementation.
Platform: | Size: 313344 | Author: uyuy0401 | Hits:

[VHDL-FPGA-Verilogattachments_15_02_2011.

Description: barrel shifter in vhdl coding
Platform: | Size: 1024 | Author: cdac | Hits:

[Software Engineeringbarrael-shifter

Description: its barrel shifter in mentor graphis
Platform: | Size: 7168 | Author: sreenivasulu | Hits:

[VHDL-FPGA-VerilogBarrel-shifter-design-report

Description: 实现变量移位操作的32-bit桶形移位寄存器;实现DES算法的数据路径设计及控制路径设计,有仿真和附录verilog代码 -Variable shift operations to achieve 32-bit barrel shifter implement the DES algorithm data path and control path design design
Platform: | Size: 33792 | Author: BOBO | Hits:

[VHDL-FPGA-VerilogARM-barrel-shifter

Description: 用verilog描述语言实现的桶形移位器。-Description language with verilog barrel shifter.
Platform: | Size: 980992 | Author: | Hits:

[Software EngineeringInitial-description-of-a-barrel-shifter

Description: Initial description of a barrel shifter
Platform: | Size: 1024 | Author: sahl | Hits:

[VHDL-FPGA-Verilogassg-8-(barrel-shifter)-final

Description: Barrel shifter IN VHLD , using structural modelling
Platform: | Size: 131072 | Author: milind | Hits:

[VHDL-FPGA-VerilogBarrel-shifter

Description: 用verilog编写的16位桶形移位器代码-Written in verilog code for 16-bit barrel shifter
Platform: | Size: 77824 | Author: tang | Hits:

[VHDL-FPGA-VerilogBarrel-shifter

Description: barriel shifter is used to design the unconfined shift. It has optional code to decide the logical function.also, you can decide the bit your shifter.
Platform: | Size: 7168 | Author: | Hits:

[VHDL-FPGA-Verilogbarrel-shifter-verilog

Description: this code is used for implementation of barrel shifter using verilog language
Platform: | Size: 2048 | Author: appolo | Hits:
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