Search - baud rate

[Other] rate

Description: 网上下载的计算波特率的小软件，希望对大家有用。-downloaded Baud Rate Calculation of small software, useful for all.
Platform: | Size: 6901 | Author: 徐娜 | Hits:

Description: 波特率计算助手V1.0 日期：2004-8-28 51波特率计算助手，可以计算波特率、记数初值等作者：赵兵败 oicq:25767751 email:killer523@163.com-baud rate calculation assistant V1.0 date : 2004-2006-8-28 51 baud rate calculation aides, baud rate can be calculated, such as initial counting Author : Zhao defeated Live : 25767751 email : killer523@163.com
Platform: | Size: 6883 | Author: 赵兵败 | Hits:

[SourceCode] Automatic Baud Rate Detection on the MSP430

Description: Automatic Baud Rate Detection on the MSP430
Platform: | Size: 45279 | Author: long923923923@163.com | Hits:

[SCM] AN205SW

Description: cp210x非标波特率设置工具 CP210x Baud Rate Configuration Utility v1.0 Release Notes Copyright (C) 2004 Silicon Laboratories, Inc. This release contains the following components: * CP210xBaudRateAliasConfig.exe * CP210xManufacturing.DLL * CP210xBaudRateAliasConfig VC++ project * REL_NOTES.TXT (this file) -cp210x non-standard baud rate configuration tool CP210x Baud Rate Configuration Utility v1.0 Release Notes Copyright (C) 2004 Silicon Laboratories, Inc.. This release contains the following components :* CP210xBaudRateAliasConfig.exe CP210xManufacturing.DLL*** CP210xBaudRateAliasConfig REL_NOTES VC project. TXT (this file)
Platform: | Size: 94208 | Author: | Hits:

[Linux-Unix] serial

Description: linux 串口的配置,波特率,数据位,校验位,停止位,等等,以及串口的接收程序-linux serial port configuration, the baud rate, data bits, parity bit, stop bits, etc., as well as the serial port reception procedures
Platform: | Size: 2048 | Author: huliangchun | Hits:

[VHDL-FPGA-Verilog] uart

Description: 基于FPGA的uart控制器，波特率可选，VHDL编程，Quartusii 6.0 平台，vhdl语言编程-FPGA-based UART controller, an optional baud rate, VHDL programming, Quartusii 6.0 platform, vhdl language programming
Platform: | Size: 5093376 | Author: 吕常智 | Hits:

[VHDL-FPGA-Verilog] RS232_pro

Description: RS232 verilog coding 全参数化设计可以自己设定波特率时钟频率等完全FPGA实现调通-RS232 verilog coding the entire parametric design can set the baud rate clock frequency of FPGA to achieve complete transfer pass
Platform: | Size: 2048 | Author: dinsh | Hits:

[Com Port] UART_51

Description: 串口设置：包括初始化及应用；串口调试方面直接能用上-// This sample uses the UART to communicate with a PC. Therefore it sets up the internal // Baud Rate Generator (BRG). The LPC900 receives a command ( S ), sent by the PC and // sends out a response, which can be displayed with the program Hyperterminal . // The parameter settings for // 9600 baud, 8 data bits, 1 stop bit and no flow control. // To begin the communication click on wait for call .
Platform: | Size: 1024 | Author: 罗岳 | Hits:

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[Other] rate

[Other] 51baud-rate-aide

[SourceCode] Automatic Baud Rate Detection on the MSP430

[SCM] AN205SW

[Linux-Unix] serial

[VHDL-FPGA-Verilog] uart

[VHDL-FPGA-Verilog] RS232_pro

[Com Port] UART_51

[Com Port] uart_zhiwen

[SCM] boundary_generator_using_T1

[assembly language] AutoBaud

[Other Embeded program] MSP430-baud-rate-calculation-software

[Other] baud-rate-and-bit-rate

[VHDL-FPGA-Verilog] uart

[e-language] Search-for-the-baud-rate

[SCM] Baud-Rate-Detection

[SCM] baud-rate-generator

[Graph Recognize] Baud-rate-detection

[Other] msp430f149-serial-baud-rate

[SCM] Baud-rate-initial-value-setting

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