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[Embeded-SCM Develop63

Description: 从8255的C口低四位输入一个BCD码,高四位也输入一个BCD码,两者相加后,以BCD码的形式从A口输出到指示灯。CS接280H。-From the 8255 low of C 4 I enter a BCD code, the high-four also enter a BCD code, the two add up to the form of BCD code output from the A to the light. CS then 280H.
Platform: | Size: 1024 | Author: sifrompow | Hits:

[VHDL-FPGA-Verilogbinary_to_BCD

Description: 本人编写的2进制转换为BCD码的verilog程序,绝对可用,已测试通过。-I write binary to BCD verilog program, absolutely free, have been tested.
Platform: | Size: 1024 | Author: 范志荣 | Hits:

[VHDL-FPGA-Verilogbinary2bcd

Description: binary to bcd code converter design using verilog
Platform: | Size: 1024 | Author: Vadivelan A | Hits:

[Embeded-SCM DevelopBarcode

Description: 将输入的货号转化为压缩的BCD格式.如果长度不满14,则以右对齐-Item will be entered into a compressed BCD format. If the length of under 14, then right-justified
Platform: | Size: 1024 | Author: ening | Hits:

[Embeded-SCM Developbcd_to_binary

Description: ALTERA NIOS处理器实验,QUARTUS下用VHDL编译成处理器,bcd码转bin-Altera NIOS processor experiments QUARTUS using VHDL compiler into processor, code switch bin bcd
Platform: | Size: 2048 | Author: 王小京 | Hits:

[Embeded-SCM Developbinary_to_bcd

Description: ALTERA NIOS处理器实验,QUARTUS下用VHDL编译成处理器,bin转bcd-Altera NIOS processor experiments QUARTUS using VHDL compiler into processor, bin turn bcd
Platform: | Size: 2048 | Author: perce | Hits:

[Othersopc430_V1.1

Description: 1.实现了27条核心指令中的26条,没有实现BCD加法指令。 2.指令周期为6~8个机器周期,返回指令ret除外,需要11个机器周期 3.没有实现中断功能,所以类似定时器这类的外设没有添加,目前添加了乘法器外设,P1和P2端口,且P1和P2端口没有中断功能 4.流水线各个模块是异步工作方式,即前一级模块工作完成,下一级才开始工作。 5.留有外设接口,方便用户添加自定义外设 6.在EP4CE155F29C8器件上运行最高频率为100MHz-1. Achieve a 27 core instruction 26, did not realize BCD addition instruction.                 2 cycles of 6 to 8 machine cycles, except for the return instruction ret requires 11 machine cycles                 3 interrupt function is not implemented, so this kind of peripherals like timers did not add that the current multiplier added peripherals, P1 and P2 port, and the port P1 and P2 do not interrupt function                 4 lines each module is asynchronous work, that is, before a module is completed, the next one to start work.                 5 left peripheral interfaces, user add custom peripherals 6 EP4CE155F29C8 devices running on the highest frequency of 100MHz
Platform: | Size: 2653184 | Author: liguangmin | Hits:

[Com Portkey

Description: 以韦根格式输出按键BCD码信息,如按键1的BCD码为0001,按键BCD码由触摸按键产生,查询下降沿。-send key information
Platform: | Size: 1024 | Author: Frank Zhang | Hits:

[VHDL-FPGA-Verilogverilog-code-FOR-COMPARATOR--TFF-AND-BCD-TO-7SSD.

Description: // File : 4 Bit Comparator design using behavior modeling style.v-// File : 4 Bit Comparator design using behavior modeling style.v
Platform: | Size: 2048 | Author: dhishna | Hits:

[VHDL-FPGA-Verilogt1_bin2bcd

Description: 二进制转BCD的verilog程序,实现二进制数到BCD的转换,该程序具有节约FPGA的内部逻辑资源等特点- Binary to BCD s verilog procedures to achieve binary number to BCD conversion, the program has an internal FPGA logic resources saving features
Platform: | Size: 458752 | Author: 宋国志 | Hits:

[VHDL-FPGA-Verilogadd4_bcd

Description: 程序描述了BCD码加法器,采用的是逢十进一的规则。-Procedures described BCD adder, using the rules of decimal.
Platform: | Size: 28672 | Author: 沈湛 | Hits:

[VHDL-FPGA-Verilogbcdadd

Description: 4-Bit BCD Adder in Verilog
Platform: | Size: 353280 | Author: KinKer | Hits:

[VHDL-FPGA-Verilogbcdsubtract

Description: 4-Bit BCD subtract in Verilog
Platform: | Size: 561152 | Author: KinKer | Hits:

[VHDL-FPGA-VerilogLab8_binbcd4

Description: 4位二进制-BCD码转换器的设计与实现.4位二进制-BCD码转换器的真值表,本实验中用Verilog语句来描述。-Design of 4 bit-BCD converter and implementation of.4 binary-BCD code converter truth table, use the Verilog statement in this experiment to describe.
Platform: | Size: 169984 | Author: penglx1803 | Hits:

[assembly languageProteus

Description: 利用51单片机 BCD译码芯片和两位LED构成一个数码管扫描显示系统 两个数码管同时循环显示0~9-The use of 51 single-chip, BCD decoder chip and two LED displays constitute a digital scanning system, two digital tube display while loop from 0 to 9.
Platform: | Size: 6144 | Author: 赵小川 | Hits:

[SCM1

Description: 80c51单片机开发16进制bcd转换c程序源代码-80c51 microcontroller development hex bcd conversion c source code
Platform: | Size: 1024 | Author: 杨 鑫 | Hits:

[Embeded-SCM DevelopX2504345

Description: One for the external microcontroller to see the door x2502345 c-language program-A BCD conversion software for the microcontroller, 16-hex BCD conversion software
Platform: | Size: 1024 | Author: arourd | Hits:

[VHDL-FPGA-Verilogds18b20

Description: ds18b20实现的温度采集系统,分为接口时序和温度转换为bcd代码两部分。-The temperature acquisition circuit design based on FPGA
Platform: | Size: 4096 | Author: 林枫 | Hits:

[SCMbcd2hex

Description: 快速,方便Keil C51的十进制到十六进制BCD 2HEX源程序,在Keil C51上测试通过,且源代码程序的产品应用上量产多年-The fast, easy Keil C51 decimal to hexadecimal BCD 2HEX source, the Keil C51 test and product application source code program production for many years
Platform: | Size: 1024 | Author: daniel | Hits:

[VHDL-FPGA-VerilogB2BCD

Description: 基于VHDL的二进制转BCD码,简单高效,占用资源少,是国外一本最新书籍提倡的一种写法。-Binary switch based on VHDL BCD code, a simple and efficient method of resource usage, less is foreign advocates a kind of writing a new book.
Platform: | Size: 173056 | Author: 张瀚元 | Hits:
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