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[VHDL-FPGA-Verilog] Seven-Segment-Decoder

Description: 用VHDL语言在FPGA上实现将十进制bcd码转换成七段led显示码-FPGA using VHDL language to achieve will be converted to decimal bcd yards led seven segment display code
Platform: | Size: 1024 | Author: 吴金通 | Hits:

[VHDL-FPGA-Verilog] 2

Description: BCD码七段译码器CC4511,用VHDL语言来描述CC4511。-BCD code seven-segment decoder CC4511, using VHDL language to describe the CC4511.
Platform: | Size: 2048 | Author: 李小勇 | Hits:

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