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Description: CRC循环校验码的VERILOG源文件,在MODELSIM下的一个工程。-Cyclic Check Code VERILOG source, the MODELSIM of a project.
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Size: 26624 |
Author: 刘仪 |
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Description: 对512Bytes的数据纠正4bit,用于MLC NAND FLASH的数据校验与恢复。-512Bytes data to correct 4bit, for MLC NAND FLASH data validation and recovery.
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Size: 8192 |
Author: qiandejun |
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Description: 用verilog编写的bch译码器,包括测试文件,随机加载了比特流,进行了测试。-Prepared using Verilog BCH decoder, including test papers, random load the bit stream to carry out the test.
Platform: |
Size: 357376 |
Author: 牛顿 |
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Description: 使用verilog语言实现BCH编码,用于通信信道编码-Using verilog language implementation BCH coding, channel coding for communication
Platform: |
Size: 9465856 |
Author: 咕嘟大树 |
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