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Description: 用verilog写的cpld的各种分频程序，希望大家指正，谢谢！-using Verilog cpld written by the various sub-frequency procedures in the hope that we stand corrected, thank you!
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Size: 992 |
Author: 沈柱 |
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Description: 用verilog写的cpld的各种分频程序，希望大家指正，谢谢！-using Verilog cpld written by the various sub-frequency procedures in the hope that we stand corrected, thank you!
Platform: |
Size: 1024 |
Author: 沈柱 |
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Description: eda应用中的硬件描述语言vhdl4倍频率设计方法-beipin
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Size: 2048 |
Author: yang ye |
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Description: 倍频出200M时钟，对输入脉冲进行计数测量时间间隙-produce 200M clock，count the input pulse
Platform: |
Size: 197632 |
Author: 储培 |
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Description: FPGA工程文件，可以实现倍频以及小数倍频功能-FPGA PROJECTION
Platform: |
Size: 226304 |
Author: hzh |
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