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Description: 这是一个用VHDL语言编写的并口转串口程序,在altera开发系统下验证通过,运用于开发板与计算机之间的通信,源程序可以提供参考-This is a use of the VHDL language Parallel to Serial procedures, In altera development system under test passed, the development of applied between the panels and computer communications, can provide a reference source
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Size: 1196 |
Author: 华涛 |
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Description: 这是一个用VHDL语言编写的并口转串口程序,在altera开发系统下验证通过,运用于开发板与计算机之间的通信,源程序可以提供参考-This is a use of the VHDL language Parallel to Serial procedures, In altera development system under test passed, the development of applied between the panels and computer communications, can provide a reference source
Platform: |
Size: 1024 |
Author: 华涛 |
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Description: 51单片机实验,IO口链接165进行并转串口得实验,有源码以及仿真电路图-51 single-chip experiment, IO port 164 link to serial to parallel port was experimental, there is source code and circuit simulation
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Size: 34816 |
Author: ai溺 |
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Description: 用FPGA的状态及实现将单片机输出的16位数据串口输出 当数据输出完成后,LD数据线产生一个时钟的高电平-FPGA state when the the microcontroller output 16-bit data serial output data output is complete, the LD data lines generate a clock HIGH
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Size: 1024 |
Author: fd |
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Description: 串行转并行算法,自己编写,已经运行成功,算法简单易懂。-Serial to parallel algorithm
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Size: 359424 |
Author: 王萌 |
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Description: 并行转串行的另外一种算法,压缩包内拥有算法的说明,很有效的一种算法-An algorithm of parallel-to-serial another algorithm, compression algorithm package has, very effective
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Size: 402432 |
Author: 王萌 |
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