Search - bt.656

[Other resource] lf_decode

Description: 检测BT.656视频格式中内含的同步信号，可分离出行场同步信号。-detection R BT.656 video format containing the synchronization signal separable travel market synchronous signal.
Platform: | Size: 87382 | Author: cloud | Hits:

[Graph program] rgb2ycrcb

Description: 真正可用的RGB转YCbCr的verilog程序，输出格式为标准BT.656格式，经本人亲自编写并验证，可在硬件上正常工作。
Platform: | Size: 1936 | Author: cloud | Hits:

[VHDL-FPGA-Verilog] lf_decode

[Other] ITU656

Description: INTERFACES FOR DIGITAL COMPONENT VIDEO SIGNALS IN 525-LINE AND 625-LINE TELEVISION SYSTEMS OPERATING AT THE 4:2:2 LEVEL OF RECOMMENDATION ITU-R BT.601-INTERFACES FOR DIGITAL VIDEO SI COMPONENT GNALS IN 525-LINE AND 625-LINE TELEVISION SYST EMS OPERATING AT THE ,4 : 2 LEVEL OF RECOMMENDATION ITU-R BT.601
Platform: | Size: 128000 | Author: 刘军良 | Hits:

[Industry research] ITU_R_BT_656_4

Description: INTERFACES FOR DIGITAL COMPONENT VIDEO SIGNALS IN 525-LINE AND 625-LINE TELEVISION SYSTEMS OPERATING AT THE 4:2:2 LEVEL OF RECOMMENDATION ITU-R BT.601 (PART A) -INTERFACES FOR DIGITAL COMPONENT VIDEO SIGNALS IN 525-LINE AND 625-LINE TELEVISION SYSTEMS OPERATING AT THE 4:2:2 LEVEL OF RECOMMENDATION ITU-R BT.601 (PART A)
Platform: | Size: 112640 | Author: jiang | Hits:

[Multimedia program] 601656

Description: The digital Video Standard according to ITU-R BT. 601＆656,视频标准.-The digital Video Standard according to ITU-R BT. 601
Platform: | Size: 84992 | Author: 秋夜清风 | Hits:

[Multimedia program] ITU-R-BT.601656

Description: CCIRE 601_656 protocol , video digital signal
Platform: | Size: 82944 | Author: archerkite | Hits:

[Graph program] rgb2ycrcb

Description: 真正可用的RGB转YCbCr的verilog程序，输出格式为标准BT.656格式，经本人亲自编写并验证，可在硬件上正常工作。-Truly available to the Verilog RGB to YCbCr procedures BT.656 output format as the standard format, as I personally prepared and verified in the hardware work correctly.
Platform: | Size: 2048 | Author: cloud | Hits:

[Other] R-REC-BT.656-4-199802-I!!MSW-E

Description: about itu-656 video standard -about itu-656 video standard
Platform: | Size: 69632 | Author: fyge_free | Hits:

[Video Capture] camera_up

Description: Camera Interface模块是视频输入转换存储模块。该模块一端接通用的video camera设备，另一端接AHB总线。实现了将Camera捕捉到的数据进行转换、并通过DMA存储到memory中。该IP支持ITU-R BT 601/656 8-bit 模式。支持YCbCr, RGB格式输入。可以将camera产生的YCbCr信号转换成24bit RGB 信号，然后下采样生成16bit RGB 5：6：5的LCD能直接读取显示的数据。该设备支持图像的镜像和翻转，以便适应手持式设备在移动环境中图像的捕捉。可变的同步信号极性使得可以兼容各种摄像头外设。Camera Interface兼容AMBA规范， AHB SLAVE接口，用于读取软件配置数据和设置数据存放地址和1帧数据占用的空间。-The Camera IP Core is small and flexible video data coverter. It is connected to a typical video camera ICs with 8-bit digital video data, Horizontal synchronization and Vertical synchronization signals. The core is connected through FIFO to a WISHBONE bus on the other side. Both sides of the core can operate at fully asynchronous clock frequencies. The Camera IP Core convertes 4:2:2 YCbCr video data (sometimes called YUV, but not totally the same Y is the same, while Cb and Cr are U and V multiplied by a constant) to a 24-bit RGB. 24-bit or 16-bit RGB data, downsampled from 24-bit RGB, is then sent to the system (video) memory, however conversion can also be by-passed. Interrupt can be generated after frame-buffer in system (video) memory is filled up or after setable number of horizontal lines written to frame-buffer.
Platform: | Size: 32768 | Author: 孙喆 | Hits:

[Books] ITU656_chinese

Description: ITU656 中文版国际电信联盟无线电通信部门656-3 号建议书：工作在ITU-R BT.601 建议（部分A）的 4:2:2 级别上的525 行和625 行电视系统中的数字分量视频信号的接口-STUDIO ENCODING PARAMETERS OF DIGITAL TELEVISION FOR STANDARD 4:3 AND WIDE-SCREEN 16:9 ASPECT RATIOS
Platform: | Size: 451584 | Author: xu | Hits:

[Books] s0111

Description: 提出一种使用 FPGA 现场可编程门阵列实现一个 ITU2R BT. 656并行硬件接口传输 4 路 CIF格式视频流的方法。该方法说明了从视频处理器到 FPGA传输 4路 CIF格式视频流的数据结构 ,利用该数据结构 ,一个 ITU2R BT. 656的硬件接口可传输 4路不同的 CIF格式的视频数据流。FP2(GA将 4路视频数据流分离、插值生成 D1 720 ×576像素格式的数据输出给视频处理器。
Platform: | Size: 169984 | Author: cui | Hits:

[Software Engineering] FPGA

Description: 针对MT9M111数字图像传感器,采用Cyclone系列 EP1C6Q240C6作为主控芯片,设计并实现了ITU-R BT.656视频数据的采集、色彩空间转换、DVI-I显示控制的数字视频转换系统。系统可以将传感器的输入图像以1280×960(60Hz)和 1280×1024(60Hz)格式输出到DVI-I显示器上,并具有图像静止功能,同时在系统空闲时,可以将系统设置为待机状态,来降低功耗。-Aimed at the digital image sensor MT9M111,used Cyclone EP1C6Q240C6 as the main control chip,designed and implemented the conversion system of the collection of the ITU-R BT.656 video data,color space conversion,and the display on DVI-I monitor.This system can display the image from the sensor on DVI-I monitor in the mode of 1280960(60 Hz)or 12801024(60 Hz),image freezing is also supported.Moreover,the system can be set into standby state when the system is idled,for low power consumption.
Platform: | Size: 563200 | Author: 将建 | Hits:

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[Other resource] lf_decode

[Graph program] rgb2ycrcb

[VHDL-FPGA-Verilog] lf_decode

[Other] ITU656

[Industry research] ITU_R_BT_656_4

[Multimedia program] 601656

[Multimedia program] ITU-R-BT.601656

[Graph program] rgb2ycrcb

[Other] R-REC-BT.656-4-199802-I!!MSW-E

[Video Capture] camera_up

[Books] ITU656_chinese

[Books] s0111

[Software Engineering] FPGA

[File Format] BT.656format

[GIS program] tvp5150a

[Other] DigitalVideoStandards

[VHDL-FPGA-Verilog] d1_dec

[Video Capture] BT656_Format

[Multimedia Develop] SAA7120H_21H_2

[Program doc] ITU-BT-656-4

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