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[Other resource] bfm

Description: Verilog HDL编写的总线功能模型，十分有用，需要的下载-Verilog HDL prepared by the bus functional model is useful, it needs to download
Platform: | Size: 2015 | Author: wyl | Hits:

[Other resource] BFM_design_material

Description: bfm（总线功能模型）设计的基础教材，值得一看，需要lotus打开文档-BFM (bus functional model) designed on the basis materials, an eye-catcher, Lotus needs to open files
Platform: | Size: 52279 | Author: wyl | Hits:

[VHDL-FPGA-Verilog] bfm

Description: Verilog HDL编写的总线功能模型，十分有用，需要的下载-Verilog HDL prepared by the bus functional model is useful, it needs to download
Platform: | Size: 2048 | Author: wyl | Hits:

[Other] BFM_design_material

Description: bfm（总线功能模型）设计的基础教材，值得一看，需要lotus打开文档-BFM (bus functional model) designed on the basis materials, an eye-catcher, Lotus needs to open files
Platform: | Size: 52224 | Author: wyl | Hits:

[Books] Verilogtestbench

Description: 西北工业大学航空微电子中心关于如何写testbench的论文。。论文结合一个ATM测试平台的TESTBENCH设计， 讨论了TESTBENCH的结构和总线功能模型（BFM） ， 并对使用 BFM模型进行TESTBENCH设计的策略和方法 进行了探讨， 希望能对广大设计者有所帮助。-Aviation Microelectronic Center, Northwestern Polytechnical University, testbench on how to write a paper. . Paper combined with a design of ATM test platform TESTBENCH discussed TESTBENCH structure and bus functional model (BFM), and use the BFM model TESTBENCH design strategies and methods Discussed, hoping to help the vast number of designers.
Platform: | Size: 79872 | Author: 高 | Hits:

[USB develop] USB_WDF

Description: A primary design goal for Windows Driver Foundation (WDF) was to make the driver models easy to extend to support new types of hardware. The first specialized input/output (I/O) targets in both User-Mode Driver Framework (UMDF) and Kernel-Mode Driver Framework (KMDF) are hardware-specific and support Universal Serial Bus (USB) devices. You can use the USB I/O targets to write a fully functional Windows driver for a USB device that uses the Windows USB device stack. This paper provides information about writing UMDF and KMDF drivers for USB devices. It assumes that you are familiar with the WDF driver model.
Platform: | Size: 94208 | Author: McBit | Hits:

[Data structs] OS_driver-and-ticket

Description: 要求完成的主要任务: （包括课程设计工作量及其技术要求，以及说明书撰写等具体要求） 1．模拟公共汽车司机和售票员开关门及行车操作的同步模型。 2．设计报告内容应说明： ⑴ 需求分析； ⑵ 功能设计（数据结构及模块说明）； ⑶ 开发平台及源程序的主要部分； ⑷ 测试用例，运行结果与运行情况分析； ⑸ 自我评价与总结 -Required to complete major tasks: (including course design work and technical requirements, as well as written instructions and other specific requirements) 1. Analog bus driver and conductor switch doors and traffic operations synchronization model. 2. Design report shall state: ⑴ needs analysis ⑵ functional design (data structure and the module description) ⑶ source development platform and the main part ⑷ test, analysis of operating results and operating conditions ⑸ self-evaluation and summary
Platform: | Size: 920576 | Author: 张亮 | Hits:

[VHDL-FPGA-Verilog] bfm

Description: Bus Functional Model Design
Platform: | Size: 2048 | Author: Yak | Hits:

[VHDL-FPGA-Verilog] i2c_slave_model

Description: I2C控制总线的重机模型，用于验证I2C设计是否实现了功能描述-I2C bus control heavy machine model, used to verify whether the design implements I2C Functional Description
Platform: | Size: 2048 | Author: Luke | Hits:

[Program doc] pfsoc_mss_sim_ug

Description: The PolarFire SoC FPGA's Microcontroller Subsystem (MSS) is modeled with Microsemi's AMBA Bus Functional Model (BFM) and it is limited at FIC itself. For information about the supported instructions and syntax of the BFM commands, refer to the Microsemi DirectCore AMBA BFM User's Guide.
Platform: | Size: 398639 | Author: jiangtq | Hits:

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