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[VHDL-FPGA-Verilogmdct.tar

Description: 这是06年4月刚刚完成的程序,从opencore.org下载而来。用vhdl语言描写,以及matlab仿真,testbench,以及在xinlinx上的综合。 The MDCT core is two dimensional discrete cosine transform implementation designed for use in compression systems like JPEG. Architecture is based on parallel distributed arithmetic with butterfly computation. -This is April 06 had just completed the process, from opencore.org downloaded from. Vhdl description language used, and Matlab simulation, testbench, and the Comprehensive xinlinx. The MDCT core is two dimensional discrete cosin e transform implementation designed for use in JPEG compression systems like. Architecture i 's based on parallel distributed arithmetic wit h butterfly computation.
Platform: | Size: 1767424 | Author: 陈朋 | Hits:

[VHDL-FPGA-VerilogFPGA_SONGER

Description: 基于FPGA的乐曲硬件演奏电路设计的实现,有完整的VHDL代码,并有PDF详细说明如何下载及跳线设置,并“梁祝”在GW48系列开发平台上下载调试成功。音乐优美-FPGA-based hardware music concert circuit design to achieve a complete VHDL code. and a detailed account of how the PDF download and set up the jumper, and "Butterfly" in a series of development platforms GW48 download debugging success. Music beautiful!
Platform: | Size: 746496 | Author: wyy | Hits:

[VHDL-FPGA-Verilogdiexing

Description: VHDL编写的蝶形变换,可用于FFT变换-VHDL prepared by the butterfly transform, FFT can be used to transform
Platform: | Size: 2048 | Author: same | Hits:

[OtherVHDL_example_100

Description: 本书通过100个实例,详细介绍便件描述语言vHDL的各种语法现象及其在专用集成电路(AHc)设计蝴还中的使用方法。-the book through one hundred examples, it detailed description language vHDL pieces of the phenomenon and its various grammatical in ASIC (AHc) were also designed butterfly The usage.
Platform: | Size: 5175296 | Author: haopowan | Hits:

[Compress-Decompress algrithms601792346200732319490634862

Description: jpeg压缩中的DCT蝶型算法verilog代码-jpeg DCT compression algorithm verilog code BUTTERFLY
Platform: | Size: 5120 | Author: wuguanying | Hits:

[Othermusic

Description: vhdl实现音乐播放,播放梁祝乐曲-VHDL realization of music player, play music Butterfly
Platform: | Size: 911360 | Author: YANG | Hits:

[VHDL-FPGA-Verilogliangzhu

Description: FPGA开发入门的Verilog HDL程序2---梁祝音乐播放,真实可用,验证通过,工程环境为Altera Quartus II -Introduction to the Verilog HDL FPGA development process 2 --- Butterfly music player, the real available, verified by the project environment for the Altera Quartus II
Platform: | Size: 301056 | Author: renyong0801 | Hits:

[MPIbutterfly

Description: 附件代码实现了基4FFT的碟形单元运算,是FFT算法的核心部分,并且此碟形单元运算是基于浮点运算的-Annex code base of the dish 4FFT computing unit is the core of the FFT algorithm, and this dish is based on the computing unit of the floating-point operations
Platform: | Size: 4096 | Author: 钟毓秀 | Hits:

[VHDL-FPGA-Verilog16bit_FFT

Description: 16点FFT的VHDL源代码,含详细设计文档。-16:00 FFT of the VHDL source code, including detailed design documents.
Platform: | Size: 699392 | Author: xbl | Hits:

[matlabfft

Description: fft代码,采用蝶形算法,包括C,matlab和verilog代码-fft code, using butterfly algorithm, including C, matlab and Verilog code
Platform: | Size: 47104 | Author: | Hits:

[VHDL-FPGA-Verilogmusic

Description: 设计并调试好一个能产生”梁祝”曲子的音乐发生器,并用EDA实验开发系统(拟采用的实验芯片的型号可选Altera的MAX7000系列的 EPM7128 CPLD ,FLEX10K系列的EPF10K10LC84-3 FPGA, ACEX1K系列的 EP1K30 FPGA,Xinlinx 的XC9500系列的XC95108 CPLD,Lattice的ispLSI1000系列的1032E CPLD)进行硬件验证。 设计思路 根据系统提供的时钟源引入一个12MHZ时钟的基准频率,对其进行各种分频系数的分频,产生符合某一音乐的频率,然后再引入4HZ的时钟为音乐的节拍控制,最后通过扬声器放出来。 -Design and debug a good one can produce The Butterfly Lovers piece of music generator, and the development of EDA experimental system (to be used in models of experimental chip with optional Altera s MAX7000 series EPM7128 CPLD, FLEX10K series EPF10K10LC84-3 FPGA, ACEX1K Series The EP1K30 FPGA, Xinlinx the XC9500 series XC95108 CPLD, Lattice s ispLSI1000 series 1032E CPLD) for hardware verification. Design according to the system clock source provided by the introduction of a benchmark 12Mhz clock frequency and its various sub-sub-band frequency coefficients, resulting in consistent with the frequency of a particular music, and then the introduction of 4Hz clock control for the music beats, and finally through Loudspeakers released.
Platform: | Size: 8192 | Author: lijq | Hits:

[VHDL-FPGA-Verilogsong

Description: 音乐,梁祝,其中应用VHDL编写的全过程梁祝。-Music, Butterfly Lovers, in which the application of VHDL to prepare the whole process of Butterfly Lovers.
Platform: | Size: 1024 | Author: 1 | Hits:

[ELanguagedianziqin

Description: 这是一个有关梁祝的电子琴设计代码,可能和别人的有点相识,但是还是希望大家好好看看 -This is a Butterfly s flower design code, and those of others may be a little known, but still hope that a good look at
Platform: | Size: 54272 | Author: 赵玉 | Hits:

[Software EngineeringFPGA_4FFT

Description: 针对高速数字信号处理的要求,提出用FPGA 实现基- 4FFT 算法,并对其整体结构、蝶形单 元进行了分析. 采用蝶算单元输入并行结构和同址运算,能同时提供蝶形运算所需的4 个操作 数,具有最大的数据并行性,能提高处理速度 按照旋转因子存放规则,蝶形运算所需的3 个旋转 因子地址相同,且寻址方式简单 输出采取与输入相似的存储器 运算单元同时采用3 个乘法的 复数运算算法来实现.-In accordance with the requirements of high speed digital signal processing , the algorithmof radix O4 implemented with FPGA and the integrated architecture and butterfly unit are analyzed. With butterfly u2 nit input which is designed by parallel structure and the same address calculation , four operation codes the butterfly unit needs can be provided simultaneously to have the most data parallel and improve the speed of calculation. According to the rotation parameters memory regulation , the addresses of three rotation parame2 ters of butterfly unit are the same with simple style of address generation and similar input and output memo2 ries. The operating unit adopted is implemented by three complex calculation algorithm of multiplication si2 multaneously.
Platform: | Size: 360448 | Author: 王晓 | Hits:

[VHDL-FPGA-Verilogvhdlfft4

Description: 基4算法的vhdl实现,蝶形变换等的详细设计-Radix-4 algorithm of VHDL realize, butterfly transform the detailed design, etc.
Platform: | Size: 12288 | Author: 邓翔 | Hits:

[VHDL-FPGA-Verilogbutterfly

Description: 蝶形运算,可用于DCT变换,FFT变换的模块-Butterfly computation, can be used for DCT transform, FFT transform module
Platform: | Size: 1024 | Author: 过时无双 | Hits:

[Special Effectsbutterfly-verilog

Description: VHDL的DCT变换.蝶型算法,很好用的,希望能有帮助-The DCT transform VHDL. Butterfly algorithm, very good with the hope that it can be helpful
Platform: | Size: 1024 | Author: zhaoyizhi | Hits:

[VHDL-FPGA-Verilogbutterfly

Description: 蝶形运算的VHDL代码,可以实现,没验证-VHDL code butterfly operations can be achieved, no authentication
Platform: | Size: 1024 | Author: 干璐 | Hits:

[VHDL-FPGA-Verilogfft_hdl

Description: 一个 16点 FFT 用基2蝶形运算单元完成,有测试环境。-16 points FFT with a radix-2 butterfly computation unit is completed and test environment.
Platform: | Size: 21504 | Author: wei | Hits:

[Mathimatics-Numerical algorithmsFFT(VHDL)

Description: FFT算法vhdl实现 蝶形运算-butterfly fft vhdl
Platform: | Size: 368640 | Author: 倦怠怪兽 | Hits:
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