Description: The concept of the Altera Nios II embedded processor implementation inside Field Programmable Gate Array [FPGA] of the CCD camera for the “Pi of the Sky” experiment is presented. The digital board of the CCD camera, its most important components, current implementation of firmware [VHDL] inside the FPGA and the role of external 8051 microcontroller is briefly described. The main goal of the presented work is to get rid of the external microcontroller and to design new system with Nios II processor built inside FPGA chip. Constraints for implementing the design into the existing camera boards are discussed. New possibilities offered by a larger FPGA for next generation of cameras are considered.-The concept of the Altera Nios II embedded processor implementation inside Field Programmable Gate Array [FPGA] of the CCD camera for the “Pi of the Sky” experiment is presented. The digital board of the CCD camera, its most important components, current implementation of firmware [VHDL] inside the FPGA and the role of external 8051 microcontroller is briefly described. The main goal of the presented work is to get rid of the external microcontroller and to design new system with Nios II processor built inside FPGA chip. Constraints for implementing the design into the existing camera boards are discussed. New possibilities offered by a larger FPGA for next generation of cameras are considered. Platform: |
Size: 1427456 |
Author:Francis Wu |
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Description: Implementation of GPU (Graphics Processing Unit) that rendered triangle based models. Our goal was to generate complex models with a movable camera. We wanted to be able to render complex images that consisted of hundreds to thousands of triangles. We wanted to apply interpolated shading on the objects, so that they appeared more
smooth and realisitc, and to have a camera that orbitted around the object, which allowed us to
look arond the object with a stationary light source. We chose to do this in hardware, because our initial implementation using running software on the NIOS II processor was too slow. Implementing parallelism in hardware is also easier to do than in software, which allows for more efficiency. We used Professor Land s floating point hardware, which allowed us to do calculations efficiency, which is essential to graphics. Platform: |
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Author:Praveen |
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Description: 本文围绕一个包含Nios II软核处理器的可编程片上系统展开数码相机的样机设计。论文首先对样机所要达到的整体功能进行了规划，接下来并行开展了软硬件设计。在硬件方面，充分利用了所使用平台提供的SD卡插槽、键盘、数码管、SRAM等各种硬件资源，并用Verilog HDL硬件描述语言设计了样机系统所需要的VGA接口控制器、CMOS图像传感器接口控制器以及VGA显示存储器；在软件方面，本文基于Nios II软核处理器用C语言实现了SD卡的驱动、FAT文件系统的移植、VGA显视器的驱动以及BMP图片文件的转换与显示等功能，并能通过键盘操作和用户界面控制样机拍照和相片浏览。实验结果表明本样机系统设计正确，软硬件各模块绝大部分工作正常，为进一步研究数码相机的应用建立起了一个实用平台。-This paper focuses on a Nios II soft core processors, programmable on-chip system to launch a digital camera prototype design. Firstly, the overall function of the prototype to be achieved by planning, then in parallel hardware and software design. Take full advantage of the hardware side, using the platform provided by the SD card slot, keyboard, digital tube, SRAM and other hardware resources, and using Verilog HDL hardware description language to design a prototype system VGA interface controller, CMOS image sensors interface controller and the VGA display memory the software side, based on the Nios II soft core processor implemented in C, the SD card driver, and the transplantation of the FAT file system, the VGA display driver, and BMP image file conversion and display function, and through the keyboard and user interface control prototype photographs and photo browsing. The experimental results show that this prototype system is designed properly, most of the hardware and softwa Platform: |
Size: 15078400 |
Author: |
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