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[Other resource] USB 2.0 IP Core DL : 1: USB20的IP CORE,可以直接用在SOPC下，自动完成全部的枚举，只需修改枚举参数即可！-USB20 IP CORE, can be directly used in SOPC, automatically complete the enumeration. only a modification of enumerated parameters can be!
Update : 2008-10-13 Size : 177.03kb Publisher : 林风
[VHDL-FPGA-Verilog] MC8051 IP Core DL : 0: 8051的IP软核，使用硬件描述语言编写，可以下载到FPGA/CPLD中作为片上系统的处理器-8051 IP soft-core, the use of hardware description language can be downloaded to the FPGA/CPLD as a system-on-chip processor
Update : 2025-02-17 Size : 520kb Publisher : zy
[VHDL-FPGA-Verilog] I2C_IPcore_VHDL DL : 0: 这是一个I2C串行数据通信协议以VHDL硬件描述语言实现的IP核，可直接编译运行-I2C serial data communication protocol to VHDL hardware description language of the IP core can be directly translated Operation
Update : 2025-02-17 Size : 6kb Publisher : 陈州徽
[VHDL-FPGA-Verilog] USB 2.0 IP Core DL : 0: USB20的IP CORE,可以直接用在SOPC下，自动完成全部的枚举，只需修改枚举参数即可！-USB20 IP CORE, can be directly used in SOPC, automatically complete the enumeration. only a modification of enumerated parameters can be!
Update : 2025-02-17 Size : 177kb Publisher : 林风
[ARM-PowerPC-ColdFire-MIPS] Altera的IP源码8237 DL : 0: 名鼎鼎的Synopsys公司出的8051IP Core VHDL语言编写，能被keilC51支持-renowned name of the company Synopsys 8051IP Core VHDL language, support can be keilC51
Update : 2025-02-17 Size : 203kb Publisher : 上面的
[Driver Develop] wb_dma.tar DL : 0: DMA的控制器的IP核,和ATA控制器配合,可以实现DMA方式高速传输数据.-DMA controller IP core, and ATA controller tie, DMA can achieve high-speed transmission of data.
Update : 2025-02-17 Size : 140kb Publisher : 李想
[VHDL-FPGA-Verilog] user_logic_VGA_Controller DL : 0: user_logic_VGA_Controller，适合于DE2开发板，把这个文件夹放在工程目录之中，就可以在SOPC里直接添加VGA_Controller IP核了，很方便使用。-user_logic_VGA_Controller. suitable for Dictyophora development board, this folder on the project directory, it can be added directly SOPC Lane VGA_Controller IP core, very convenient to use.
Update : 2025-02-17 Size : 69kb Publisher : 曾
[VHDL-FPGA-Verilog] mlite.tar DL : 0: Plasma IP Core 你可以利用这个组件在FPGA中设计MIPS结构的CPU -Plasma IP Core You can use this component in FPGA design the structure of MIPS CPU
Update : 2025-02-17 Size : 98kb Publisher : xinyang
[VHDL-FPGA-Verilog] MIT_MIPS_Core.tar DL : 0: 麻省理工的一个实验室实现的MIPS IP CORE，可以在FPGA上跑通 -a Massachusetts Institute of Technology laboratory achieved MIPS IP CORE, the FPGA can run on Link
Update : 2025-02-17 Size : 28kb Publisher : xinyang
[VHDL-FPGA-Verilog] ml505_pcie_x1_plus DL : 0: Xilinx 公司PCI Express IP核应用参考设计。通过这个样例，用户可以掌握PCI Express应用设计的一般方法，了解PCI Express的工作原理。-Xilinx Inc. PCI Express IP core reference design applications. Through this example, the user can master the application of the design of PCI Express general approach to understand the working principle of PCI Express.
Update : 2025-02-17 Size : 1.71mb Publisher : daniel J
[Other Embeded program] SRAMCotroller DL : 0: 一个SRAM控制器的IP核，很不错，有兴趣的朋友可以下去-An SRAM controller IP core, very good friends who are interested can go on
Update : 2025-02-17 Size : 315kb Publisher : liufanyu
[Streaming Mpeg4] rs_enc DL : 0: 使用IP Core实现了3GPP/UMTS所规定的Turbo码编码，可以在Virtex全系列和Spartan-3E等芯片上使用，最多支持１６路信号，能提供3GPP所要求的1/3码率输出和可选的1/5码率输出-Use IP Core achieved 3GPP/UMTS provided for Turbo-Coded, you can Virtex series and Spartan-3E chip such as the use, supports up to 16-way signal, 3GPP can provide the required 1/3 bit-rate output and optional 1/5 Rate Output
Update : 2025-02-17 Size : 1kb Publisher : 刘横
[VHDL-FPGA-Verilog] AVR DL : 0: AVR IP CORE 可以直接用于工程的开发和已经通过编译和仿真-AVR IP CORE can be directly used for project development and has passed the compiler and simulation
Update : 2025-02-17 Size : 66kb Publisher : 毋杰
[VHDL-FPGA-Verilog] RISC_CPU DL : 0: RISC CPU IP CORE 可以用于直接的工程开发应用有详细的说明书-RISC CPU IP CORE can be used to direct the development and application of the project has a detailed brochure
Update : 2025-02-17 Size : 561kb Publisher : 毋杰
[VHDL-FPGA-Verilog] 8051core DL : 0: 8051 VHDL IP Core，有兴趣的可以-8051 VHDL IP Core, who are interested can
Update : 2025-02-17 Size : 25kb Publisher : lllixplg
[VHDL-FPGA-Verilog] DE2_NIOS_LITE_SRAM DL : 0: DE2-SRAM-IP-CORE 需要开发ip core的朋友可以参考哦 ~-DE2-SRAM-IP-CORE need to develop friends can ip core reference Oh ~
Update : 2025-02-17 Size : 1.5mb Publisher : 张曦
[VHDL-FPGA-Verilog] can DL : 0: can IP CORE .VERY GOOD AS A STUDY FILE-can IP CORE. VERY GOOD AS A STUDY FILE
Update : 2025-02-17 Size : 96kb Publisher : lijun
[VHDL-FPGA-Verilog] can DL : 0: 基于Verilog HDL 的一个CAN总线IP核。-Based on Verilog HDL a CAN bus IP core.
Update : 2025-02-17 Size : 87kb Publisher : 戴求淼
[VHDL-FPGA-Verilog] ethernet10-100M-IP-core DL : 0: 以太网10-100M IP核Verilog源码，可综合-Ethernet 10-100M IP core Verilog source code can be integrated
Update : 2025-02-17 Size : 723kb Publisher : owen
[assembly language] CAN-IP-Core DL : 0: CAN IP Core can硬件的IP核，用于cpld和fpga编程can接口-CAN IP Core
Update : 2025-02-17 Size : 117kb Publisher : liucl

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