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Description: 七段数码显示程序
VHDL
开发环境为Xilinx 的集成开发工具ISE-VHDL digital display program development environment for Xilinx ISE Integrated Development Tools
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Size: 1024 |
Author: imljg |
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Description: 卷积码，并行编码，FPGA，通过了测试验证-CC Code， Parallel Coding， FPGA
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Size: 1024 |
Author: 天之痕 |
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Description: 8位单片机与DS18B20并行双向通信。
Quartus II 8.1项目工程文件.
主源程序文件为DS18B20.v,里面有详细注解。
例子：
DS18B20 数据地址 0xf000（ROM=0） DS18B20 ROM指令地址 0xf001（ROM=1）
外部电源供电且只有一DS18B20的读取法：
发送CC到0xf001,
等待busy=0说明器件已准备好,
读0xf001的Bit1=1说明存在器件,Bit0=1为控制忙(可以省略此步）
发送44到0xf000,
等待busy=0，
发送CC到0xf001，
等待busy=0，
发送BE到0xf000，
等待busy=0，
空读一次，
等待busy=0，
然后读到的就是DS18B20内部数据了.读一次必须等待busy=0，否则控制器将拒绝所有操作。
搜索ROM：
发送F0或EC到0xf001,
等待busy=0说明器件已准备好,
读0xf001的Bit1=1说明存在器件,Bit0=1为控制忙(可以省略此步）
空读0xf000，（第1次）
等待busy=0，
读0xf000，Bit0是DS18B20发送位的信息，Bit1为DS18B20发送位的补码信息
等待busy=0，
写0xf000，内容为路径。
等待busy=0，
。。。。。。
空读0xf000，（第64次）
等待busy=0，
读0xf000，Bit0是DS18B20发送位的信息，Bit1为DS18B20发送位的补码信息
等待busy=0，
写0xf000，内容为路径。
等待busy=0，
结束
-8-bit microcontroller with DS18B20 parallel two-way communication.
Quartus II 8.1 Project documents.
Primary source documents DS18B20.v, which detailed notes.
Example:
DS18B20 Data Address 0xf000 (ROM = 0) DS18B20 ROM instruction address 0xf001 (ROM = 1)
An external power supply and only a DS18B20 read method:
Send CC to 0xf001,
Wait for busy = 0 shows the device is ready,
Read 0xf001 the existence of Bit1 = 1 shows the device, Bit0 = 1 for the control of busy (you can omit this step)
Send 44 to 0xf000,
Wait for busy = 0,
Send CC to 0xf001,
Wait for busy = 0,
Send BE to 0xf000,
Wait for busy = 0,
Blank reading time,
Wait for busy = 0,
Then read is DS18B20 internal data. Read one must wait for the busy = 0, otherwise the controller will reject all operations.
Search ROM:
Send F0 or EC to 0xf001,
Wait for busy = 0 shows the device is ready,
Read 0xf001 the existence of Bit1 = 1 shows the device, Bit0 = 1 for the control of busy (you can omi
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Size: 338944 |
Author: yuantielei |
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Description: tài liệ u này mình up lên các bạ n tham khả o nhan, nế u có sai sót mong mọ i ngư ờ i góp y
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Size: 4657152 |
Author: nguyen the vinh |
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Description: 802.16d 的卷积编码和解码的VHDL实现-802.16d cc encoding and decoding,writing in VHDL
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Size: 4096 |
Author: 汪舟 |
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