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[Other resourcePLL4046

Description: 基于CD4046构成的PLL及应用 CD4046构成的PLL在通信、频率处理、自动控制等技术领域中应用较为广泛,正确理解CD4046对掌握电路基本组成、原理及应用。对处理实际工程问题有很大帮助-based on the PLL constitute CD4046 and CD4046 constitute the application of the PLL communications, frequency processing, automatic control technology has been widely applied. CD4046 correct understanding of the basic circuit master composition, theory and application. Dealing with practical engineering problems will be of great help
Platform: | Size: 114937 | Author: liming | Hits:

[Software EngineeringPLL4046

Description: 基于CD4046构成的PLL及应用 CD4046构成的PLL在通信、频率处理、自动控制等技术领域中应用较为广泛,正确理解CD4046对掌握电路基本组成、原理及应用。对处理实际工程问题有很大帮助-based on the PLL constitute CD4046 and CD4046 constitute the application of the PLL communications, frequency processing, automatic control technology has been widely applied. CD4046 correct understanding of the basic circuit master composition, theory and application. Dealing with practical engineering problems will be of great help
Platform: | Size: 114688 | Author: liming | Hits:

[matlabmatlab--AGC

Description: 实现MATLAB下的音频AGC,关键是要有高效的算法。效果不错。-MATLAB realize the audio AGC, the key is to have efficient algorithms. Good results.
Platform: | Size: 60416 | Author: alger cui | Hits:

[OtherCD4046

Description: CD4046 phase-locked loop induction heating power supply in the application of induction heating
Platform: | Size: 104448 | Author: AngleKing | Hits:

[OtherCD4046

Description: CD4046中文资料 CD4046中文资料-CD4046 Chinese data CD4046 Chinese data CD4046 Chinese data
Platform: | Size: 7646208 | Author: | Hits:

[VHDL-FPGA-Verilogbeipingqi

Description: 基于cd4046的倍频器的设计,可以实现1到10khz的倍频-Cd4046-based frequency doubler is designed to achieve a multiplier to 10khz
Platform: | Size: 727040 | Author: wlp | Hits:

[OtherPPL

Description: 该论文设计了一个基于锁相环技术的倍频器,用Proteus软件仿真,效果不错。-Phase-Locked Loop
Platform: | Size: 3043328 | Author: 张燕妮 | Hits:

[SCMFM

Description: 本设计根据锁相环原理,通过两片CD4046搭接基本电路来实现FM调制/解调电路的设计,将调制电路的输出信号作为解调电路的输入信号,最终实现信号的调制解调。原理分析,我们得到的载波信号的电压 大于3V,最大频率偏移 5KHz,解调电路输出的FM调制信号的电压 大于200mV可以看出我们的具体设计符合设计指标。-FM
Platform: | Size: 235520 | Author: xianfeng | Hits:

[Embeded-SCM Develop4046

Description: cd4046的应用与介绍使用的详细介绍,多多支持-cd4046 application and use of the detailed description, a lot of support
Platform: | Size: 84992 | Author: cool | Hits:

[VHDL-FPGA-Verilogt3

Description: CD4046锁存器的pspice仿真程序-CD4046 latches pspice simulation program
Platform: | Size: 1024 | Author: tiantian | Hits:

[Software EngineeringThe-principle-of-phase-locked-loop

Description: 主要介绍了锁相环的基本原理,PLL参数测试示例展示,重点分析了CD4046——通用的CMOS锁相环集成电路,MT8870——音调译码器(Tone Decoder)是MITEL 公司所开发生产为一颗常用复频译码IC。-Introduces the basic principles of phase-locked loop, PLL parameter test sample shows, analyzes the CD4046-- generic CMOS PLL IC, MT8870-- tone decoder (Tone Decoder) is MITEL company developed and produced for a common stars complex frequency decoding IC.
Platform: | Size: 389120 | Author: yang | Hits:

[Software Engineering74hc4046

Description: 本设计根据锁相环原理,通过两片CD4046搭接基本电路来实现FM调制/解调电路的设计,将调制电路的输出信号作为解调电路的输入信号,最终实现信号的调制解调。原理分析,我们得到的载波信号的电压 大于3V,最大频率偏移 5KHz,解调电路输出的FM调制信号的电压 大于200mV可以看出我们的具体设计符合设计指-The design phase locked loop principle, by two overlapping basic circuit to achieve CD4046 FM modulation/demodulation circuit design, the modulation circuit output signal as an input signal demodulation circuit, and ultimately the modem signal. Principle of the voltage of the carrier signal we get is more than 3V, the maximum frequency deviation 5KHz, the output of the FM demodulation circuit voltage modulation signal is larger than 200mV can see that we comply with the design refers to the specific design
Platform: | Size: 693248 | Author: ztzheng | Hits:

[SCMMP3

Description: 简易Mp3,触摸控制,PWm驱动蜂鸣器, cd4046调制解调-简易Mp3,触摸控制,PWm驱动蜂鸣器, cd4046调制解调
Platform: | Size: 2033664 | Author: 咋了 | Hits:

[OtherCD4046 PLL Test

Description: CD4046 PLL Test circuits
Platform: | Size: 30720 | Author: mouhanad | Hits:

[SCM锁相环频率合成

Description: 基于51单片机的锁相环频率合成器的设计。使用PLL集成芯片CD4046,可编程分频芯片CD4522(同MC14522),使用LCD1602显示,频率由按键输入。标准输入信号为1khz方波。(Design of PLL Frequency Synthesizer Based on 51 single chip microcomputer. Using PLL integrated chip CD4046, programmable frequency division chip CD4522 (MC14522), using LCD1602 display, frequency by keystroke. The standard input signal is 1kHz square wave.)
Platform: | Size: 53248 | Author: 帅帅不菜 | Hits:

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