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[Other resource] cfft

Description: CFFT是一个数据宽度和点数都可配置的基4 FFT core,用VHDL实现
Platform: | Size: 168526 | Author: 方淼 | Hits:

[VHDL-FPGA-Verilog] cfft

Description: CFFT是一个数据宽度和点数都可配置的基4 FFT core,用VHDL实现-CFFT is a data width and the base points can be configured 4 FFT core, using VHDL realize
Platform: | Size: 168960 | Author: | Hits:

[VHDL-FPGA-Verilog] vhdlfftdesign

Description: 浮点FFI，的VHDL实现及HDL功能测试方法的研究 附录B加法处理器测试平台代码 附录CFFT处理器的测试平台代码-The floating-point FFI company encourages, implement and function testing HDL VHDL method The appendix B addition processor test platform code Appendix CFFT processor test platform code
Platform: | Size: 3072 | Author: 王晓 | Hits:

[VHDL-FPGA-Verilog] cfft

Description: 基于FPGA的快速傅里叶算法设计，VHDL语言写的，编译可通过-FPGA-based fast Fourier algorithm design, VHDL language, the compiler can
Platform: | Size: 86016 | Author: zll | Hits:

[VHDL-FPGA-Verilog] cFFT

Description: CFFT is a radix-4 fast Fourier transform (FFT) core with configurable data width and a configurable number of sample points in the FFT. Twiddle factors are implemented using the CORDIC algorithm, causing the gain of the CFFT core to be different from the standard FFT algorithm. This variation in gain is not important for orthogonal frequency division modulation (OFDM) and demodulation. The gain can be corrected, to that of a conventional FFT, by applying a constant multiplying factor.
Platform: | Size: 183296 | Author: Nagendran | Hits:

[VHDL-FPGA-Verilog] cfft

Description: vhdl code for cyclic cfft
Platform: | Size: 2048 | Author: pandiyan | Hits:

[VHDL-FPGA-Verilog] cfft_control

Description: vhdl code for cyclic cfft control
Platform: | Size: 1024 | Author: pandiyan | Hits:

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