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[RFIDcic code Verilog代码

Description: cic code选用verilog代码编写
Platform: | Size: 2629 | Author: flcan@163.com | Hits:

[Audio programshuzhuangfilter

Description: 有关于梳状滤波器的设计源码,大家可以参考,不错的-Comb filter on the design of source code, we can refer to, well
Platform: | Size: 55296 | Author: 花儿 | Hits:

[VHDL-FPGA-Verilogcic3s32

Description: 一个3阶的32位抽取的cic滤波器的verilog源代码-A 3-bands of the 32 samples CIC filter Verilog source code
Platform: | Size: 1024 | Author: 岑楠 | Hits:

[MiddleWarecic4

Description: cic 4 stages vhdl code
Platform: | Size: 1024 | Author: dehua | Hits:

[VHDL-FPGA-Verilogcic

Description: verilog码写的CIC滤波器的程序,包括4倍抽取CIC滤波器和内插的CIC滤波器两个-Verilog code written by CIC filter procedures, including 4 times the extraction CIC filter and the CIC interpolation filter two
Platform: | Size: 22528 | Author: 桃子 | Hits:

[VHDL-FPGA-VerilogCICdeVHDL

Description: 本人编写的3级抽取器的vhdl代码,可供大家参考一下,如有不妥之处,还请多多指教.-I prepared three Extractor of VHDL code, available for reference for everyone and, if inappropriate, also requested the exhibitions.
Platform: | Size: 1024 | Author: 谢白玉 | Hits:

[VHDL-FPGA-Verilogyl_cic32

Description: 一个三阶梳妆滤波器(CIC)的vhdl的源码-Dressing a third-order filter (CIC) of the VHDL source code
Platform: | Size: 1024 | Author: 白杨 | Hits:

[Communication-MobileCIC

Description: CIC梳妆滤波器生成器,生成任意位数任意长度的CIC滤波器源代码-Dressing CIC filter generator to generate any arbitrary length of the median of the CIC filter source code
Platform: | Size: 134144 | Author: lizhizhou | Hits:

[VHDL-FPGA-Verilogcordic

Description: CIC滤波器源码,有VERILOG写的,非常有用哦-CIC filter source code, Verilog has written a very useful Oh
Platform: | Size: 2048 | Author: 刘记名 | Hits:

[VHDL-FPGA-Verilogtdmddc_v71

Description: ddc的vhdl源代码,没有经过调试,只是作为分享,大家有什么意见和建议请回复邮件-ddc the VHDL source code, no debugging, just as share what everyone has opinions and suggestions, please reply to e-mail
Platform: | Size: 26624 | Author: zhangxi | Hits:

[Other Embeded programcic3s32

Description: 阶的32倍抽取cic滤波器verilog代码-Order CIC filter 32 times the extraction Verilog code
Platform: | Size: 1024 | Author: zly | Hits:

[VHDL-FPGA-VerilogFPGArealiztionofdigitalsignalprocessing

Description: 数字信号处理FPGA实现 实用程序和文件,有sine.exe ---输入宽度。输出对应的正弦波表 mif文件 csd.exe --- 寻找整数和分数的标准有符号数字量(canonical signed digit ,CSD)表达式程序 fpinv.exe --- 倒数计算浮点数表的程序 dagen.exe ---分布式算法文件生成HDL" onclick="tagshow(event)" class="t_tag">VHDL代码的程序 cic.exe ---CIC滤波器计算参数的程序 -Digital Signal Processing FPGA realization of practical procedures and documents, there are sine.exe--- input width. Sine wave output of the corresponding csd.exe--- Table mif file to find the integer and fractional number of the volume of standard symbols (canonical signed digit, CSD) Expression Programming fpinv.exe--- countdown procedures for calculation of floating-point form dagen.exe--- documents distributed algorithm to generate HDL " onclick =" tagshow (event) " class =" t_tag " > VHDL program code cic.exe--- CIC filter process parameters
Platform: | Size: 260096 | Author: kevin | Hits:

[Communication-MobileCIC

Description: CIC梳状滤波器verilog源码,包括积分器,下抽级以及梳状滤波器三个部分。-CIC comb filter verilog source code, including the integrator, under the pump, as well as comb filter class is in three parts.
Platform: | Size: 1024 | Author: 张佳培 | Hits:

[Modem programCICverilog

Description: CIC滤波器的veilog代码,需要的硬件少。-CIC digital filter code
Platform: | Size: 2048 | Author: 刘晓志 | Hits:

[matlabUntitled

Description: cic抽取滤波器的matlab软件仿真实现的源代码-cic decimation filter implementation matlab source code for software simulation
Platform: | Size: 1024 | Author: 曹欣 | Hits:

[VHDL-FPGA-VerilogCIC

Description: CIC IP core实现结构中自动生成的接口代码,基于软件无线电的应用,在毕业论文中已使用过。-CIC IP core to achieve the structure of the interface code automatically generated, based on software radio applications, has been used in the thesis.
Platform: | Size: 7168 | Author: 黄顺涛 | Hits:

[3G developpcicdecimate

Description: pipelined cic filter matlab source code-pipelined cic filter matlab source code
Platform: | Size: 1024 | Author: liuzhaohui | Hits:

[matlabCIC-Filter

Description: 梳妆滤波器的毕业论文和VC实现代码,有很强的参考价值-CIC Filter thesis and VC implementation code, there is a strong reference value
Platform: | Size: 518144 | Author: gaocheng | Hits:

[VHDL-FPGA-Verilog61i_cic_v3_0_vhdl_ise

Description: CIC code In VHDL+Xlinx ISE
Platform: | Size: 12288 | Author: rocky | Hits:

[VHDL-FPGA-VerilogCIC-filter-master

Description: Code Verilog CIC Filter FPGA
Platform: | Size: 646144 | Author: MrGio | Hits:
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