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Search - cic verilog - List
[
Other resource
]
cic
DL : 0
verilog码写的CIC滤波器的程序,包括4倍抽取CIC滤波器和内插的CIC滤波器两个
Update
: 2008-10-13
Size
: 22.17kb
Publisher
:
桃子
[
Other resource
]
cic-simo
DL : 1
用于dspbuilder 可以直接生成vhdl源码,或者verilog源码
Update
: 2008-10-13
Size
: 39.64kb
Publisher
:
wq
[
RFID
]
cic code Verilog代码
DL : 0
cic code选用verilog代码编写
Update
: 2011-05-19
Size
: 2.57kb
Publisher
:
flcan@163.com
[
VHDL-FPGA-Verilog
]
CIC
DL : 0
介绍了积分梳状滤波器(CIC)设计,压缩包里面有程序的流程图,采用verilogHDL编写,在modelsim上可以实现仿真结果,非常不错-Introduced the integral comb filter (CIC) design, there are procedures for compressed packets flow chart, using verilogHDL prepared on the ModelSim simulation results can be achieved very good
Update
: 2025-02-17
Size
: 150kb
Publisher
:
yaoyongshi
[
VHDL-FPGA-Verilog
]
cic3s32
DL : 0
一个3阶的32位抽取的cic滤波器的verilog源代码-A 3-bands of the 32 samples CIC filter Verilog source code
Update
: 2025-02-17
Size
: 1kb
Publisher
:
岑楠
[
VHDL-FPGA-Verilog
]
cic
DL : 0
verilog码写的CIC滤波器的程序,包括4倍抽取CIC滤波器和内插的CIC滤波器两个-Verilog code written by CIC filter procedures, including 4 times the extraction CIC filter and the CIC interpolation filter two
Update
: 2025-02-17
Size
: 22kb
Publisher
:
桃子
[
Embeded-SCM Develop
]
CIC
DL : 0
本文讲解CIC数字滤波器的设计,对设计者有很大的帮助-This article on the CIC digital filter design, for designers of great help
Update
: 2025-02-17
Size
: 126kb
Publisher
:
asdtgg
[
SCM
]
cic1s2
DL : 0
单级CIC2倍内插滤波器,用verilogHDL实现-CIC2 times the single-stage interpolation filter, used to achieve verilogHDL
Update
: 2025-02-17
Size
: 487kb
Publisher
:
Carl
[
VHDL-FPGA-Verilog
]
cordic
DL : 0
CIC滤波器源码,有VERILOG写的,非常有用哦-CIC filter source code, Verilog has written a very useful Oh
Update
: 2025-02-17
Size
: 2kb
Publisher
:
刘记名
[
Other Embeded program
]
cic3s32
DL : 0
阶的32倍抽取cic滤波器verilog代码-Order CIC filter 32 times the extraction Verilog code
Update
: 2025-02-17
Size
: 1kb
Publisher
:
zly
[
VHDL-FPGA-Verilog
]
cic_4_dec
DL : 0
实现4倍抽取的CIC抽取滤波器模块的Verilog实现,在对数据进行抽取之前,首先进行滤波-Extracted 4 times realize CIC decimation filter module Verilog realize that in the data collected before the first filter
Update
: 2025-02-17
Size
: 1kb
Publisher
:
楚鹤
[
VHDL-FPGA-Verilog
]
cic-simo
DL : 0
用于dspbuilder 可以直接生成vhdl源码,或者verilog源码-用于dspbuilder ?梢灾 ??由??蓈hdl?
Update
: 2025-02-17
Size
: 39kb
Publisher
:
wq
[
Communication-Mobile
]
Integral_comb_filter_verilog_design
DL : 0
积分梳状滤波器(CIC)verilog设计.rar-Integral comb filter verilog design.rar
Update
: 2025-02-17
Size
: 1kb
Publisher
:
海天之洲
[
Communication-Mobile
]
CIC
DL : 0
CIC梳状滤波器verilog源码,包括积分器,下抽级以及梳状滤波器三个部分。-CIC comb filter verilog source code, including the integrator, under the pump, as well as comb filter class is in three parts.
Update
: 2025-02-17
Size
: 1kb
Publisher
:
张佳培
[
VHDL-FPGA-Verilog
]
cic_dec_8_five
DL : 0
CIC抽取滤波器,抽取系数8,verilog版本,用于数字下变频-CIC decimation filter, extraction coefficient of 8, verilog version, for digital down-conversion
Update
: 2025-02-17
Size
: 1kb
Publisher
:
王刚
[
VHDL-FPGA-Verilog
]
cic
DL : 0
抽取滤波的Verilog实现,经测试可用-Decimation filter
Update
: 2025-02-17
Size
: 1kb
Publisher
:
anderson
[
VHDL-FPGA-Verilog
]
cic.verilog
DL : 0
3阶的32倍抽取cic滤波器verilog代码-Level 3, 32 times the extraction of cic filter verilog code
Update
: 2025-02-17
Size
: 1kb
Publisher
:
[
Embeded-SCM Develop
]
cic
DL : 0
cic设计 verilog -cic verilog design verilog
Update
: 2025-02-17
Size
: 1kb
Publisher
:
孙累
[
VHDL-FPGA-Verilog
]
cic-dicemator
DL : 0
该文件包含数字抽取滤波器cic的verilog代码,经测试可用,且简介,消耗硬件资源较少。-This file contains digital sampling filter cic verilog code, after testing is available, and the introduction, less consumption of hardware resources.
Update
: 2025-02-17
Size
: 1kb
Publisher
:
张俊
[
VHDL-FPGA-Verilog
]
CIC-filter-master
DL : 0
Code Verilog CIC Filter FPGA
Update
: 2025-02-17
Size
: 631kb
Publisher
:
MrGio
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