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[Other resource] 8位大小比较器 DL : 0: 8位大小比较器的VHDL源代码，Magnitude Comparator VHDL description of a 4-bit magnitude comparator with expansion inputs-eight compared with the size of the VHDL source code, Magnitude Comparator VHDL description of a 4-bit magnitude comparator inputs with expansion
Update : 2008-10-13 Size : 1.19kb Publisher : 蔡孟颖
[VHDL-FPGA-Verilog] VHDL实例 DL : 0: 各种常用模块的VHDL描叙实例，PDF格式-various modules used VHDL depicts examples, PDF format
Update : 2025-02-17 Size : 165kb Publisher : 付杰
[VHDL-FPGA-Verilog] 8位大小比较器 DL : 0: 8位大小比较器的VHDL源代码，Magnitude Comparator VHDL description of a 4-bit magnitude comparator with expansion inputs-eight compared with the size of the VHDL source code, Magnitude Comparator VHDL description of a 4-bit magnitude comparator inputs with expansion
Update : 2025-02-17 Size : 1kb Publisher : 蔡孟颖
[VHDL-FPGA-Verilog] VHDL DL : 0: 8位相等比较器含源代码，用VHDL语言编写，具体很高的实用性，供读者参考-8, phase comparator, such as with the source code, using VHDL language, the specific relevance of a high for the reader is referred to
Update : 2025-02-17 Size : 1kb Publisher : lijinling
[assembly language] fazhi DL : 0: 这是一个将模拟量转换成数字量的VHDL源代码，能够转换正弦波，三角波，方波；通过设定一个阀值，再用比较器比较实现的！-This is an analog quantity into a digital representation of the VHDL source code, to convert sine wave, triangle wave, square wave by setting a threshold, then comparator compares the implementation!
Update : 2025-02-17 Size : 469kb Publisher : biao
[VHDL-FPGA-Verilog] comp DL : 0: 经典比较器源代码，VHDL语言编写，可以-Classic source code comparator, VHDL language, you can see
Update : 2025-02-17 Size : 124kb Publisher : 小马