Description: 是jpeg标准下图象压缩的vhdl实现工程,包括core文件,测试文件,工程文件-image compression vhdl realization project under standard jpeg.core files, test files and project files are included. Platform: |
Size: 1570048 |
Author:石伟 |
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Description: 是jpeg标准下图象压缩的vhdl实现工程,包括core文件,测试文件,工程文件-image compression vhdl realization project under standard jpeg.core files, test files and project files are included. Platform: |
Size: 1569792 |
Author:石伟 |
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Description: The Joint Video Team (JVT) of ISO/IEC MPEG and ITU-T VCEG are finalising a new standard for
the coding (compression) of natural video images. The new standard [1] will be known as H.264 and
also MPEG-4 Part 10, “Advanced Video Coding”. The standard specifies two types of entropy coding:
Context-based Adaptive Binary Arithmetic Coding (CABAC) and Variable-Length Coding (VLC).
This document provides a short introduction to CABAC. Familiarity with the concept of Arithmetic
Coding is assumed (see chapter 8 of [2] for an introduction to Arithmetic Coding).-The Joint Video Team (JVT) of ISO/IEC MPEG and the ITU-T JTC 1 are Finalizing a new standard for the coding (compression) of natural video images. The new standard [1] will be known as H.264 and MPEG also-4 Part 10, "Advanced Video Coding." The standard specifies two types of entropy coding : Context-based Adaptive Binary Arithmetic Coding (CABAC) and Variable-Length Coding (VLC). This document provides a short introduction to CABAC. Familiarity with the concept of Arithmetic Coding is assumed (see chapter 8 of [2] for an introduction to Arithmetic Coding). Platform: |
Size: 14336 |
Author:lucy |
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Description: 在本示例程序中，用VHDL语言实现了出租车的记价功能，在Maxplus2环境下编写，可通过cpld下载板来验证程序。在压缩包中附有示例的目的，方法和仿真时序图，是学习VHDL好例子。-in this sample program, using VHDL of the entry price of a taxi function, in preparation FLEX10K environment, through cpld download plate to the verification process. The compression package with the purpose of example, the simulation methods and timing diagrams, is a good example to learn VHDL. Platform: |
Size: 339968 |
Author:bkd |
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Description: 根据外部控制指令和送入的波形参数，在FPAG中实现任意波形的脉冲压缩。程序采用VHDL语言编写，并在实际系统中测试证明能够实现功能。-External control in accordance with instructions and sent to the waveform parameters, in FPAG arbitrary waveform to achieve the pulse compression. Procedures for the use of VHDL language and the actual test system has proved to be the realization of function. Platform: |
Size: 16384 |
Author:蒋留兵 |
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Description: JPEG标准下图象压缩的VHDL实现工程，包含文档，原代码及测试代码-JPEG image compression standard of VHDL realization of the project, including documentation, source code and test code Platform: |
Size: 1474560 |
Author:王刚 |
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Description: JPEG标准下图象压缩的vhdl实现工程，文件包括一个图像。-JPEG image compression standard works of VHDL realize that the document includes an image. Platform: |
Size: 260096 |
Author:姚大雷 |
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Description: 用于视频压缩编码中的RGB信号到色差信号变换的VHDL程序，非常实用-For video compression coding of the RGB signal to the color difference signal transform VHDL procedures, very useful Platform: |
Size: 305152 |
Author:zs |
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Description: golomb编码，用于无损图像压缩等，基于quartusii平台。-golomb coding for lossless image compression, based on the platform quartusii. Platform: |
Size: 151552 |
Author:Tangyao |
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Description: 用VHDL实现视频控制程序(实现对图像的采集和压缩)-Using VHDL video control procedures (the achievement of the image acquisition and compression) Platform: |
Size: 421888 |
Author:huangya |
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Description: 第一章到第五章的代码
本书通过100多个模块实例，详细地讲解了Verilog HDL程序设计语言，全书共分13章，内容涉及VerilogHDL语言基本概念、建模、同步设计、异步设计、功能验证等，实例包括各种加法器/计数器、乘法器/除法器、编码器/译码器、状态机、SPIMaster Controller、I2C Master controller、CAN ProtocolController、Memory模块、JPEG图像压缩模块、加密模块、ATA控制器、8位RISC-CPU等及各个实例模块相应的Testbench，所举实例具有很强的实用性和代表性，每个实例均给出了介绍、功能分析、程序代码和结果演示。-Chapter to Chapter V of the code in this book through more than 100 module instance, explain in detail the Verilog HDL programming language, the book is divided into 13 chapters, covering basic concepts VerilogHDL languages, modeling, synchronous design, asynchronous design, function authentication, etc. Examples include a variety of adder/counter, multiplier/divider, encoders/decoders, state machines, SPIMaster Controller, I2C Master controller, CAN ProtocolController, Memory modules, JPEG image compression module, encryption module, ATA controller, 8-bit RISC-CPU, etc. and the various instances of the corresponding module Testbench, The examples are highly practical and representation, each instance of it all gives the introduction, functional analysis, program code and results presentation. Platform: |
Size: 1580032 |
Author:xiao |
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