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[VHDL-FPGA-Verilog] CORDIC01

Description: CORDIC算法的硬件实现 用的verilog语言-CORDIC algorithm Hardware Implementation of the Verilog language
Platform: | Size: 221184 | Author: 李文文 | Hits:

[VHDL-FPGA-Verilog] cordic.tar

Description: cordic程序的VHDL程序源码及说明，有详细的说明，程序有注释-cordic procedures procedures VHDL source code and explanations are detailed explanations, procedures Notes
Platform: | Size: 93184 | Author: mh | Hits:

[VHDL-FPGA-Verilog] cfft

Description: CFFT是一个数据宽度和点数都可配置的基4 FFT core,用VHDL实现-CFFT is a data width and the base points can be configured 4 FFT core, using VHDL realize
Platform: | Size: 168960 | Author: | Hits:

[VHDL-FPGA-Verilog] cordic

Description: cordic verilog 程序及仿真结果 8级流水线-cordic verilog simulation results procedures and eight lines
Platform: | Size: 1024 | Author: elisen | Hits:

[Algorithm] CORDIC

Description: cordic算法，包含所有的CORDIC的算法，与发表过的论文，与实现方案-CORDIC algorithm, contains all of the CORDIC algorithm, and published papers, and implementation of programs
Platform: | Size: 8102912 | Author: elisen | Hits:

[Windows Develop] DME1

Description: fft that uses the cordic alghoritm---1
Platform: | Size: 2048 | Author: catalina | Hits:

[Mathimatics-Numerical algorithms] DME3

Description: fft that uses the cordic alghoritm---3
Platform: | Size: 3072 | Author: catalina | Hits:

[Other] DME4

Description: fft that uses the cordic alghoritm---4
Platform: | Size: 1024 | Author: catalina | Hits:

[Other] DME5

Description: fft that uses the cordic alghoritm---5
Platform: | Size: 1024 | Author: catalina | Hits:

[VHDL-FPGA-Verilog] CORDIC

Description: 数字控制振荡器（NCO，numerical controlled oscillator）是软件无线电、直接数据频 率合成器（DDS，Direct digital synthesizer）、快速傅立叶变换（FFT，Fast Fourier Transform） 等的重要组成部分，同时也是决定其性能的主要因素之一，随着芯片集成度的提高、在信号 处理、数字通信领域、调制解调、变频调速、制导控制、电力电子等方面得到越来越广泛的 应用。-Digital controlled oscillator (NCO, numerical controlled oscillator) is a software-defined radio, direct data on the frequency synthesizer (DDS, Direct digital synthesizer), Fast Fourier Transform (FFT, Fast Fourier Transform), such as an important component of the decision at the same time the performance of one of the main factors, along with the improvement of the chip integrated in the signal processing, digital communications, modulation and demodulation, frequency conversion speed control, guidance control, such as power electronics get more and more widely.
Platform: | Size: 4096 | Author: 司令 | Hits:

[VHDL-FPGA-Verilog] fft

Description: 基4快速傅里叶变换，涉及cordic算法，可以用来学习-fft
Platform: | Size: 82944 | Author: sun | Hits:

[Software Engineering] TheResearchoftherealtimesignalprocessingofSARbased

Description: 3．完成系统的FPGA程序开发与调试，主要包括FFT，IFFT，CMUL和转置 存储控制等模块，在此基础上，重点介绍了一种基于DDR SDRAM的行写行读高 效转置存储算法，在采用该算法进行转置存储操作时，读写两端的速度相匹配， 满足流水线操作要求，提高了整个系统的实时性。最后介绍了采用CORDIC算法 实现复图像求模运算的方法，分析了算法的硬件实现结构，并给出了基于FPGA 的实现方法及仿真结果。-he FPGA s development and debugging are implemented,including FFT, IFFT, CMUL and C0ntrol of CTM．Based Oll this，Implementation of a high efficient corner turn memory arithmetic with writing and reading by row based on DDR SDRAM is introduced．When using CTM with this algorithm，me speed of reading and writing maItches and meets the requirement of pipelined operation．Finally a method of model implementation for complex image based on CORDIC algorithm is introduced．The algorithm’s hardware implementation structure is analysed, and implementation methodology and simulation results are given
Platform: | Size: 5155840 | Author: mabeibei | Hits:

[VHDL-FPGA-Verilog] cFFT

Description: CFFT is a radix-4 fast Fourier transform (FFT) core with configurable data width and a configurable number of sample points in the FFT. Twiddle factors are implemented using the CORDIC algorithm, causing the gain of the CFFT core to be different from the standard FFT algorithm. This variation in gain is not important for orthogonal frequency division modulation (OFDM) and demodulation. The gain can be corrected, to that of a conventional FFT, by applying a constant multiplying factor.
Platform: | Size: 183296 | Author: Nagendran | Hits:

[VHDL-FPGA-Verilog] Digital-Signal-Processing-with-FPGA

Description: FPGA结合DSP设计，如FIR、IIR滤波器，CORDIC算法,多重采样率信号处理，FFT,有对应的VHDL/Verilog 代码code-FPGA Combines with DSP, FIR 、IIR Digital Filters,CORDIC,FFT,Adaptive Filters，VHDL/Verilog code
Platform: | Size: 10501120 | Author: rickdecent | Hits:

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