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[VHDL-FPGA-Verilog] sin.tar

Description: 神奇的sin波生成verilog源码，非常简单的代码无需乘法即可生成sin,cos，值得搞算法的人借鉴-Magic sin wave generated Verilog source code, the code is very simple multiplication can be generated without sin, cos, worthy people from engaging in algorithm
Platform: | Size: 2048 | Author: yangyu | Hits:

[VHDL-FPGA-Verilog] dds_using_FPGA

Description: 利用FPGA实现DDS经过编译没有错误。编译环境为QuartusII7.2，该环境集成了IP核，可以提高开发效率。-FPGA realization of the use of DDS compiled no errors. Compiler environment QuartusII7.2, the environment integrated IP core, can improve the development efficiency.
Platform: | Size: 100352 | Author: 白涛 | Hits:

[VHDL-FPGA-Verilog] cos

Description: FPGA实现正弦，余弦的计算，verilog语言-FPGA realization of sine, cosine calculation, verilog language
Platform: | Size: 1024 | Author: 霍东建 | Hits:

[matlab] cossincordic

Description: CORDIC算法的Matlab模拟，为了验证FPGA实现CORDIC算法的时间特性优于软件，用Matlab实现了一个计算sin, cos的CORDIC算法-Matlab simulation CORDIC algorithm, in order to verify the FPGA to achieve the time characteristics of CORDIC algorithm is superior to software, using Matlab calculated to achieve a sin, cos of the CORDIC algorithm
Platform: | Size: 1024 | Author: Wang Xinhua | Hits:

[Other] DDS

Description: dds双通道波形发生器调制解调 fpga-dds sin cos phase
Platform: | Size: 580608 | Author: 春天 | Hits:

[Technology Management] fpga

Description: 采用正弦/ 余弦细分方案,通过嵌入cos/ sin 表格于FPGA 中,合理控制步进电机两相绕组的电流,实现斩波恒流均匀细分驱动,减小了步距角、提高了步进分辨率,最高细分达到256 。-Using sine/cosine segment program, by embedding cos/sin table in the FPGA, the reasonable control of two-phase stepper motor winding current to achieve constant current chopper driver uniform subdivision, reducing the step angle, increased step resolution, the highest segment to 256.
Platform: | Size: 233472 | Author: 邓志远 | Hits:

[VHDL-FPGA-Verilog] Cordic_Verilog

Description: 基于FPGA平台的，坐标旋转数字计算方法Cordic的Verilog描述。可用于计算sin、cos等三角函数。-Cordic in verilog hdl
Platform: | Size: 3072 | Author: 孙佳宇 | Hits:

[VHDL-FPGA-Verilog] cordic

Description: 基于VHDL语言编写，可下载到FPGA板子上实现的cordic算法实现的设计，并用该算法实现sin和cos的计算，计算结果显示在数码显示管上，已包含按键防抖动功能的实现。-Based on VHDL language, can be downloaded to the the cordic algorithm implemented in the FPGA board to achieve the design and calculation of sin and cos using this algorithm, the results displayed on the digital display tube is included on the function of the realization of the button shake.
Platform: | Size: 5120 | Author: momo | Hits:

[Other] test2

Description: 使用FPGA产生正弦波形，需先通过matlab产生一组正弦信号：a=1:1:1023 b=127*cos((1/512)*pi*a)+128 b=round(b’) 将生成的1024个在1~255之间的数存入ROM之中。-Using the FPGA to generate the sine waveform, the need to produce a set of sinusoidal signals through matlab: a = 1:1:1023 b = 127* cos ((1/512)* pi* a)+128 b = round (b ' ) 1024 will generate a number between 1 to 255 are stored in the ROM.
Platform: | Size: 471040 | Author: LL | Hits:

[VHDL-FPGA-Verilog] VHDL_Examples_DE1_SoC

Description: DE1-COS学习例程,用VHDL语言为FPGA写入按键显示程序，有助于学习-DE1- COS learning routines, for FPGA with VHDL language display program written to buttons, helps to learn
Platform: | Size: 2983936 | Author: 刘国松 | Hits:

[Documents] cordic_ds249

Description: FPGA开发过程中的IP核，用于计算正弦，余弦和正切等。(IP core used in FPGA design to calculate cos and sin.)
Platform: | Size: 333824 | Author: 张扬1 | Hits:

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