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[3G develop] costas_carrier_recover DL : 0: 基于硬件定点的完整的costas载波恢复环设计，FPGA设计可以用之参考。包括输入QPSK信号，16倍符号率采样，初始频差2.4KHz，以及低通滤波器的设计等待。最重要的是有本人的注释，易于上手。-Hardware-based fixed-point of complete costas carrier recovery loop design, FPGA reference design can be used. Including input QPSK signal, 16 times the symbol rate sampling, the initial frequency difference 2.4KHz, and the design of low-pass filter to wait. The most important thing is to have my notes, easy to fly.
Update : 2025-03-15 Size : 2kb Publisher : luoshuwen
[Software Engineering] Digital_Costas_loop_in_FPGA_Design_and_Implementat DL : 0: 全数字Costas环在FPGA上的设计与实现-Digital Costas loop in FPGA, Design and Implementation
Update : 2025-03-15 Size : 267kb Publisher : 王新雨
[VHDL-FPGA-Verilog] Costas DL : 0: 介绍了某直接序列扩频、QPSK 调制系统接收通道中四相 Costas 载波跟踪环的原理及其基于 DSP+FPGA 的实现-Introduced a direct-sequence spread spectrum, QPSK modulation system, receive path Costas carrier tracking loop four-phase principle and its implementation based on DSP+ FPGA
Update : 2025-03-15 Size : 549kb Publisher : fy
[Software Engineering] Costas-matlab DL : 0: 针对扩频系统的载波同步, 研究了数字Costas 环的设计和实现方法。介绍了数字Costas 环的结构、实现载波同步的基本方法。以二阶环为例, 分析了数字锁相环的环路滤波器的参数设计方法, 为数字Costas 环的设计提供了参考。提出了在高速信号处理板( 以FPGA 和DSP 为基础) 中数字Costas 环的实现方案, 经工程验证, 能够实现载波同步, 解调出所需信号。-Design and Implementation of Digital Costas-loop
Update : 2025-03-15 Size : 200kb Publisher : ningxiaomeng
[Documents] COSTAS环载波同步 DL : 0: how to come ture a costas loop in FPGA with verilog,it is very useful on project
Update : 2025-03-15 Size : 1.62mb Publisher : yang030150