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Description: CPLD的VerilogHDL总线代码,在EPM7128SLC84-10+Quartus4平台上运行通过.-CPLD bus Verilog HDL code, the PLD-10 Quartus4 platform to run through.
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Size: 218582 |
Author: hamlemon |
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Description: 单片机与cpld总线方式通信，通过单片机io口模拟总线-SCM and cpld Bus way communication through SCM io mouth simulation Bus
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Size: 161141 |
Author: shiyj |
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Description: 摘要：本文分别以GPI0口直接连接、串行转换连接、CPLD分部连接三种方法阐述了无外部总线的Philips ARM微控制器LPC210X与点阵图形液晶显示器的接口设计，并给出硬件电路框图和主要程序。
-Abstract : GPI0 I were to directly connect a serial link, connecting CPLD Division three methods described without external bus Philips LPC210X ARM microcontroller and graphics dot-matrix LCD interface design, hardware and circuit diagram is given and the main proceedings.
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Size: 7168 |
Author: 小陈 |
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Description:
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Size: 218112 |
Author: hamlemon |
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Description: vc开发的PCI总线加密卡
PCI开发卡主要由PCI9054、93C56、16M晶振和相应的跳线、控制地址数据线等部分组成。PCI9054是PLX公司的PCI主模式桥芯片，具体芯片的说明请见Data Book；93C56是EERPOM，用于向PCI9054的初始化设置信息；16M晶振向9054提供总线时钟和CPLD7128S提供时钟；跳线用于PCI9054的设置，控制地址数据线将PCI9054的Local Bus信号线引出来，用于实验板用。-vc development of the PCI bus card encryption PCI card developed by PCI9054, 93C56, 16M crystal and the corresponding patch cords, control address data line components. PLX PCI9054 is the main mode PCI bridge chip, specific chip See Note Data Book; 93C56 is EERPOM, used to PCI9054 initialization information; 16M crystal oscillator to provide 9,054 CPLD7128S Bus clock and clock; Jumper settings for the PCI9054, control data lines to address the PCI9054 Local Bus signal line leads, the board used for experiments.
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Size: 882688 |
Author: 万宴宾 |
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Description: CPLD与51单片机总线接 -CPLD with 51 microcontroller bus access
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Size: 5120 |
Author: liang |
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Description: 这是我最近买的一套CPLD开发板VHDL源程序并附上开发板的原理图,希望对你是一个很好的帮助!其中内容为:8位优先编码器,乘法器,多路选择器,二进制转BCD码,加法器,减法器,简单状态机,四位比较器,7段数码管,i2c总线,lcd液晶显示,拨码开关,串口,蜂鸣器,矩阵键盘,跑马灯,交通灯,数字时钟.-which I have recently bought a CPLD Development Board VHDL source code accompanied the development of the plate diagram, You hope to be a good help! which states : eight priority encoder, multipliers, multi-path selectors, BCD binary switch, adder, subtraction device, the simple state machine, four comparators, seven of the digital control, i2c bus, lcd LCD allocated code switches, serial port, the buzzer sounded, matrix keyboards, Bomadeng, traffic lights, Digital Clock.
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Size: 4642816 |
Author: Jawen |
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Description: 介绍了用ALTERA公司MAX7000系列CPLD芯片实现单片机与PC104ISA总线接口之间的关行通信。给出了系统设计方法及程序源代码。
-introduces the MAX7000 Altera Corporation Series CPLD The position with SCM 04ISA bus interface between the telecommunications firms. Gives the system design and source code.
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Size: 90112 |
Author: hjgj |
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Description: 这是一个基于s3c2410的驱动，通过16位总线arm取CPLD得到的数据-based s3c2410 driven by 16 bus arm from the data obtained from the CPLD
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Size: 1024 |
Author: 李斌 |
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Description: 单片机与cpld总线方式通信，通过单片机io口模拟总线-SCM and cpld Bus way communication through SCM io mouth simulation Bus
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Size: 160768 |
Author: shiyj |
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Description: CPLD与8051的总线接口的VHDL设计源码,包括原理图,VHDL语言的源程序,仿真波形,设计的详细说明-CPLD and 8051 bus interface VHDL design source code, including drawings, VHDL source, waveform simulation, design details
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Size: 52224 |
Author: |
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Description: 单片机用总线方式与CPLD系统进行通信。-Single-chip mode with the bus system to communicate with the CPLD.
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Size: 1024 |
Author: wql |
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Description: 一种基于CPLD和PC I总线的视频采集卡的设计方案-Based on CPLD and PC I-bus video capture card designs
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Size: 191488 |
Author: 断剑 |
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Description: ＳＰＩ总线与ＣＰＬＤ之间的通信程序，可实现ＳＰＩ串行输入，通过移位寄存器后并行输出-SPI bus and the CPLD communication between these procedures is to realize SPI serial input, through the shift register parallel output after
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Size: 1024 |
Author: 金臻炜 |
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Description: 实现8通道模拟/数字转换和数字/模拟转换的例子,采用ISA总线控制逻辑.-Realize 8-channel analog/digital conversion and digital/analog converter example, the use of ISA bus control logic.
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Size: 3072 |
Author: 兰升 |
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Description: 一个关于4CAN卡的硬件程序,用VHDL编写.就是4路CAN总线-4CAN card on the hardware procedures, prepared by VHDL. Is 4 CAN BUS
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Size: 624640 |
Author: 徐 |
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Description: iic总线协议～IIC总线通讯接口器件的CPLD实现，网上下载的资料～～很不错-IIC bus protocol ~ IIC bus communication interface device CPLD realization of downloading the information ~ ~ very good
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Size: 8192 |
Author: allen |
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Description: I2C中文规范参考资料，CPLD程序设计实现I2C总线-I2C Chinese normative references, CPLD programming realization of I2C bus
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Size: 782336 |
Author: MArtin |
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Description: PLX 公司 PLX9054 pci target controller local bus interface vhdl programe-PLX inc. PLX9054 pci target controller local bus interface vhdl programe
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Size: 1024 |
Author: richardz |
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Description: CPLD + CAN总线改造，采用CPLD 进行编程，实现移相编码和电机功率输出， CAN总线进行数据通讯，使各节点独立工作又集中管理，实现集散控制。节点电机调速方案中，微控制器选用8位高性能微转换器ADμC812，逻辑与伺服控制采用全数字化方式，晶闸管主电路触发器选用ALTERA公司的 EPM7256S CPLD来完成。-CPLD+ CAN bus transformation, using CPLD for programming, coding and phase motor power output, CAN bus for data communication, so that each node independently and focus on management, distributed control. Node in the motor control program, use 8-bit high performance microcontroller micro-converter ADμC812, logic and all-digital servo control mode, the main thyristor trigger circuit used ALTERA company EPM7256S CPLD to complete.
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Size: 67584 |
Author: 李飞 |
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