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Description: 这是我看到的一些资料，希望与大家分享。也许这对您用处不大，但是我的一份诚意。-this is that I see some of the information and hope to share with you all. This may be less useful to you, but my sincerity.
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Size: 102719 |
Author: yin |
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Description: 一种基于CPLD和PC I总线的视频采集卡的设计方案
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Size: 191337 |
Author: 断剑 |
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Description: 摘要：本文分别以GPI0口直接连接、串行转换连接、CPLD分部连接三种方法阐述了无外部总线的Philips ARM微控制器LPC210X与点阵图形液晶显示器的接口设计，并给出硬件电路框图和主要程序。
-Abstract : GPI0 I were to directly connect a serial link, connecting CPLD Division three methods described without external bus Philips LPC210X ARM microcontroller and graphics dot-matrix LCD interface design, hardware and circuit diagram is given and the main proceedings.
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Size: 7168 |
Author: 小陈 |
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Description: 这是我看到的一些资料，希望与大家分享。也许这对您用处不大，但是我的一份诚意。-this is that I see some of the information and hope to share with you all. This may be less useful to you, but my sincerity.
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Size: 102400 |
Author: yin |
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Description: XilinxJTAG.rar
xilinx CPLD,FPGA的JTAG口使用说明.-XilinxJTAG.rar Xilinx CPLD, FPGA JTAG I use.
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Size: 431104 |
Author: |
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Description: 里面介绍了＂CPLD，FPGA软件编程＂，里面许多许多例子，还有原代码，我也是辛苦才收集到的资料，希望能给其他工程师派上用场．-they introduced the "CPLD, FPGA software program" Inside many, many examples, the original code, I also hard to collect the information in hopes of giving the other engineers used.
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Size: 2814976 |
Author: 陈爱华 |
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Description: 这是我最近买的一套CPLD开发板VHDL源程序并附上开发板的原理图,希望对你是一个很好的帮助!其中内容为:8位优先编码器,乘法器,多路选择器,二进制转BCD码,加法器,减法器,简单状态机,四位比较器,7段数码管,i2c总线,lcd液晶显示,拨码开关,串口,蜂鸣器,矩阵键盘,跑马灯,交通灯,数字时钟.-which I have recently bought a CPLD Development Board VHDL source code accompanied the development of the plate diagram, You hope to be a good help! which states : eight priority encoder, multipliers, multi-path selectors, BCD binary switch, adder, subtraction device, the simple state machine, four comparators, seven of the digital control, i2c bus, lcd LCD allocated code switches, serial port, the buzzer sounded, matrix keyboards, Bomadeng, traffic lights, Digital Clock.
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Size: 4642816 |
Author: Jawen |
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Description: cpld3128开发板的原理图 很有用,已经做成PCB,需要的话可以联系我-cpld3128 development board diagram useful to have caused PCB, the need to be contacted I
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Size: 152576 |
Author: qxl |
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Description: 一种基于CPLD和PC I总线的视频采集卡的设计方案-Based on CPLD and PC I-bus video capture card designs
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Size: 191488 |
Author: 断剑 |
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Description: SAA7114 和 FPGA/CPLD之间通讯的程序，本人觉得比较好，而且里面还添加了，ROM，用来存取IIC的常数和读来的数据。-SAA7114 and FPGA/CPLD communication between the procedures, I feel better, but it also added, ROM, used to access the IIC to the constant and time data.
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Size: 8192 |
Author: 张亚伟 |
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Description: 本人自己制作的JTAG下载线，只用了一片244,可以支持ARM9、Cortex™ -M3、CPLD、FPGA、89S52等。目前这些已经测试通过。性能稳定。但是注意74LS244和74HC244在性能上可能会有些区别-I own the JTAG download cable, only a 244, can support the ARM9, Cortex
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Size: 9216 |
Author: 刘意 |
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Description: ]本文介绍了如何利用CPLD(复杂可编程逻辑器件)与单片机的结合实现并行I／
O(输入／输出)接口的扩展。该设计与用8255做并行I／O接口相比，与单片机软件完全兼容，
同时拥有速度快，功耗低，价格便宜，使用灵活等特点-] This article describes how to use the CPLD (complex programmable logic device) and the single-chip combination to achieve parallel I/O (input/output) interface expansion. The design and use 8255 to do parallel I/O interface as compared with the single-chip software is fully compatible at the same time have a fast, low power consumption and cheaper prices, the use of flexible features such as
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Size: 194560 |
Author: zhengwei |
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Description: 串口实验，很好用，我还有verilog HDL
VHDL CPLD
EPM1270
源代码-Serial experiments, very good, and I still have the source code verilog HDLVHDL CPLDEPM1270
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Size: 338944 |
Author: 韩思贤 |
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Description: iic总线协议～IIC总线通讯接口器件的CPLD实现，网上下载的资料～～很不错-IIC bus protocol ~ IIC bus communication interface device CPLD realization of downloading the information ~ ~ very good
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Size: 8192 |
Author: allen |
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Description: CPLD入门知识，老师的课件！希望可以对大家有所帮助。-CPLD Starter knowledge, the teacher s courseware! I hope we can be helpful.
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Size: 1068032 |
Author: 翟进乾 |
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Description: cpld 在实际设计中的应用。以及开发际例。-the example of cpld design i think you must be like it.
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Size: 2790400 |
Author: 高天天 |
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Description: 风力发电设备用CPLD外围控制程序。包括故障锁存，IO口输出输入，地址线译码等。-Wind power generation equipment control procedures external CPLD. Including the fault latch, IO I O, address decoding and other lines.
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Size: 73728 |
Author: 吕佃顺 |
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Description: **实验目的:了解如何通过CPLD来扩展DSP的IO使用 **
**实验说明:我们引出了CPLD的16个IO口的输入和输出,具体的定义大家可 **
** 参照我们所提供的CPLD代码.在这里我们通过程序的改变来配 **
**置IO口的输出变化,并没有对输入做任何操作,大家以后需要用 **
** 的时候可以自己来做 ** **
** 实验结果:可设置断点，然后用万用表量取电平-** Experimental Objective: To learn how to DSP through the CPLD to expand IO using the experimental**** Description: We are led to the CPLD I 16 IO input and output, the specific definition of**** the light we can we provide CPLD code. Here we come through with the change in the process**** own IO output port and does not do any operation on the input and we need time** can** do****** The experimental results: you can set breakpoints, and then use a multimeter check the volume level
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Size: 268288 |
Author: 周昂 |
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Description: sources of CPLD (fpga) from freescale i.MX27 Avanced Designe System Develpment Kit board
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Size: 13312 |
Author: btttnn |
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Description: FPGA的学习指南，绝对经典，内容比较超值，我已经细心读过了，讲解清晰，快速入门。-FPGA-study guide, an absolute classic, the content of more value, I have carefully read, and to explain clearly, Getting Started.
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Size: 159744 |
Author: zhaoqiang |
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