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Description: 一个8位CISC结构的精简CPU,2还提供了编译器-an eight streamline the structure of the CISC CPU, the two also provided compiler
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Size: 94208 |
Author: 陈旭 |
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Description: 用VHDL实现8位的单片机!里面 有开发过程和代码阿!很详细的哦-using VHDL eight of SCM! Inside the development process and code Ah! Detailed oh
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Size: 53248 |
Author: 冯海 |
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Description: 极小的CPU的VHDL源代码,仅需要占用32个宏单元的CPLD。除了VHDL源代码还包括了汇编器的C源代码-minimal CPU VHDL source code, only occupy 32 macrocell CPLD. Apart from VHDL source code also includes a compilation of C source code
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Size: 205824 |
Author: 冰激凌 |
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Description: vhdl实例-完整微处理器(cpu)系统模型
-VHDL-integrity microprocessor (CPU) system model
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Size: 2048 |
Author: 张洪 |
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Description: 一个VHDL实现的RISC8位单片机-the RISC8 bit microcontrollers
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Size: 76800 |
Author: 刘恩树 |
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Description: VHDL实现简单的8位CPU
doc文件上有源代码-VHDL simple eight CPU doc documents Active code
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Size: 52224 |
Author: 紫蓝 |
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Description: cpu的VHDL的源代码,功能的简单实现-cpu VHDL source code, the function of a simple realization
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Size: 1024 |
Author: 陈娟娟 |
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Description: 16位cpu的vhdl源代码。
自己看看,没有注释。-16 cpu vhdl the source code. See for yourself, not Notes.
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Size: 95232 |
Author: 童宗挺 |
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Description: VHDL实现 8051 CPU核 Oregano Systems 8-bit Microcontroller IP-Core-VHDL 8051 CPU nuclear Oregano Systems 8-bit Mic rocontroller IP-Core
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Size: 614400 |
Author: 陈同 |
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Description:
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Size: 7168 |
Author: guan |
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Description: 8位CPU的VHDL设计,16条指令系统,以及部分测试代码,开发工具是quartusii_60_pc-8-bit CPU of the VHDL design, 16 instruction, as well as some of the test code, development tools is quartusii_60_pc
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Size: 3072 |
Author: FJ |
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Description:
一个基于VHDL 的简单8位CPU的IP core核心代码-VHDL based on a simple 8-bit CPU core code of the IP core
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Size: 275456 |
Author: wfs |
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Description: 8 bit cpu vhdl design code not tested
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Size: 86016 |
Author: zahir Parkar |
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Description: VHDL Source Code for Simple 8-bit CPU
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Size: 29696 |
Author: MI |
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Description: Simple 8 bit ALU which subs, adds, ands, ors, nots, ...
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Size: 3072 |
Author: Emrah |
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Description: 8位RISC CPU 内核源码(VERILOG版)-8 bit RSIC CPU RTL code(Verilog)
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Size: 79872 |
Author: 曾亮 |
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Description: 用全加器设计8位运算器逻辑电路图
2、根据逻辑电路用 VHDL编程实现
3、调试编译通过后,仿真
-this file can help you learn the design of cpu
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Size: 247808 |
Author: linxiaoxuan |
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Description: 用VHDL编的简易16位和8位CPU,可完成加减乘法移位等功能,拥有源码和设计文档,资料齐全-Compiled with VHDL simple 16-bit and 8-bit CPU, to be completed by addition and subtraction multiplication shift functions, with source code and design documents, data and complete
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Size: 1489920 |
Author: 雄鹰 |
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Description: using the VHDL, 8bit cpu plan
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Size: 168960 |
Author: Kim |
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Description: 包括1) 时钟发生器
2) 指令寄存器
3) 累加器
4) RISC CPU算术逻辑运算单元
5) 数据控制器
6) 状态控制器
7) 程序计数器
8) 地址多路器
-1) clock generator 2) instruction register 3) accumulator 4) RISC CPU arithmetic logical unit 5) of the data controller 6) state controller 7), the program counter 8) address multiplexer
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Size: 440320 |
Author: liuying |
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